PEM0 PEM1 PWDN

TDO

TDI

TCK TMS TRST

IEEE 1149.1 TAP

(JTAG) & 1149.6

Pre-emphasis

and Control

OUT0+

OUT0-

IN0-

IN0+

OUT1+

OUT1-

IN1-

IN1+

OUT2+

OUT2-

IN2-

IN2+

OUT3+

OUT3-

IN3-

IN3+

1

2

3

4

5

6

7

8

9

10

11

12

36

35

34

33

32

31

30

29

28

27

26

25

13

24

14

21

22

16

23

17

18

15

19

20

48

37

47

40

39

45

38

44

43

46

42

41

SCAN90004

(TQFP)

PEM0

PEM1

VDD

VDD

VDD

N/C

VDD

GND

GND

VDD

VDD

PWDN

N/C

TDO

TDI

VDD

VDD

N/C

N/C

VDD

VDD

TMS

TCK

TRST

SCAN90004

SNLS182P – MAY 2005 – REVISED APRIL 2013

www.ti.com

Block and Connection Diagrams

Figure 1. SCAN90004 Block Diagram

Figure 2. Pinout - Top View

Pin Descriptions

Pin

TQFP Pin

I/O, Type

Description

Name

Number

DIFFERENTIAL INPUTS

IN0+

13

I, LVDS

Channel 0 inverting and non-inverting differential inputs.

IN0

−

14

IN1+

15

I, LVDS

Channel 1 inverting and non-inverting differential inputs.

IN1

−

16

IN2+

19

I, LVDS

Channel 2 inverting and non-inverting differential inputs.

IN2

−

20

IN3+

21

I, LVDS

Channel 3 inverting and non-inverting differential inputs.

IN3

−

22

DIFFERENTIAL OUTPUTS

OUT0+

48

O, LVDS

Channel 0 inverting and non-inverting differential outputs. (1)

OUT0

−

47

OUT1+

46

O, LVDS

Channel 1 inverting and non-inverting differential outputs. (1)

OUT1

−

45

OUT2+

42

O, LVDS

Channel 2 inverting and non-inverting differential outputs. (1)

OUT2

−

41

OUT3+

40

O, LVDS

Channel 3 inverting and non-inverting differential outputs. (1)

OUT3-

39

DIGITAL CONTROL INTERFACE

PWDN

12

I, LVTTL

A logic low at PWDN activates the hardware power down mode.

(1)

The LVDS outputs do not support a multidrop (BLVDS) environment. The LVDS output characteristics of the SCAN90004 device have

been optimized for point-to-point backplane and cable applications.

2

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