STM32F205RFT6 datasheet(178/184 Pages) STMICROELECTRONICS

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Revision history

STM32F20xxx

178/184

DocID15818 Rev 15

20-Dec-2011

(continued)

Added maximum power consumption at TA=25 °C in Table 23: Typical

and maximum current consumptions in Stop mode.

Updated md minimum value in Table 36: SSCG parameters constraint.

Added examples in Section 6.3.11: PLL spread spectrum clock

generation (SSCG) characteristics.

Updated Table 54: SPI characteristics and Table 55: I2S characteristics.

Updated Figure 48: ULPI timing diagram and Table 61: ULPI timing.

Updated Table 63: Dynamics characteristics: Ethernet MAC signals for

SMI, Table 64: Dynamics characteristics: Ethernet MAC signals for

RMII, and Table 65: Dynamics characteristics: Ethernet MAC signals for

MII.

Section 6.3.25: FSMC characteristics: updated Table 72 toTable 83,

changed CL value to 30 pF, and modified FSMC configuration for

asynchronous timings and waveforms. Updated Figure 62:

Synchronous multiplexed PSRAM write timings.

UpdatedTable 84: DCMI characteristics.

Updated Table 92: UFBGA176+25 - ultra thin fine pitch ball grid array 10

× 10 × 0.6 mm mechanical data.

Updated Table 96: Ordering information scheme.

Appendix A.2: USB OTG full speed (FS) interface solutions: updated

Figure 87: USB OTG FS (full speed) host-only connection and added

Note 2, updated Figure 88: OTG FS (full speed) connection dual-role

with internal PHY and added Note 3 and Note 4, modified Figure 89:

OTG HS (high speed) device connection, host and dual-role in high-

speed mode with external PHY and added Note 2.

Appendix A.3: USB OTG high speed (HS) interface solutions:

removed figures USB OTG HS device-only connection in FS mode and

USB OTG HS host-only connection in FS mode, updated Figure 89:

OTG HS (high speed) device connection, host and dual-role in high-

speed mode with external PHY.

Added Appendix A.4: Ethernet interface solutions.

Updated disclaimer on last page.

24-Apr-2012

Updated VDD minimum value in Section 2: Description.

Updated number of USB OTG HS and FS, modified packages for

STM32F207Ix part numbers, added Note 1 related to FSMC and Note 2

related to SPI/I2S, and updated Note 3 in Table 2: STM32F205xx

features and peripheral counts and Table 3: STM32F207xx features and

peripheral counts.

Added Note 2 and update TIM5 in Figure 4: STM32F20x block diagram.

Updated maximum number of maskable interrupts in Section 3.10:

Nested vectored interrupt controller (NVIC).

Updated VDD minimum value in Section 3.14: Power supply schemes.

Updated Note a in Section 3.16.1: Regulator ON.

Removed STM32F205xx in Section 3.28: Universal serial bus on-the-go

full-speed (OTG_FS).

Table 97. Document revision history (continued)

Date

Revision

Changes

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