Vcc

GND

B

A

D

DE

R

RE

D

R

DE

RE

Vcc

B

A

GND

1

2

3

4

8

7

6

5

SN888C

SLLSEI4 – SEPTEMBER 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

SOIC-8

Block Diagram

(TOP VIEW)

DRIVER PIN FUNCTIONS

INPUT

ENABLE

OUTPUTS

DESCRIPTION

D

DE

A

B

NORMAL MODE

H

H

H

L

Actively drives bus high

L

H

L

H

Actively drives bus low

X

L

Z

Z

Driver disabled

X

OPEN

Z

Z

Driver disabled by default

OPEN

H

H

L

Actively drives bus high

POLARITY-CORRECTING MODE(1)

H

H

L

H

Actively drives bus low

L

H

H

L

Actively drives bus high

X

L

Z

Z

Driver disabled

X

OPEN

Z

Z

Driver disabled by default

OPEN

H

L

H

Actively drives bus low

(1)

The polarity-correcting mode is entered when VID < VIT– and t > tFS and DE = low. This state is latched when /RE turns from low to high.

RECEIVER PIN FUNCTIONS

DIFFERENTIAL

ENABLE

OUTPUT

INPUT

DESCRIPTION

VID = VA – VB

/RE

R

NORMAL MODE

VIT+ < VID

L

H

Receive valid bus high

VIT– < VID < VIT+

L

?

Indeterminate bus state

VID < VIT–

L

L

Receive valid bus low

X

H

Z

Receiver disabled

X

OPEN

Z

Receiver disabled

Open, short, idle bus

L

?

Indeterminate bus state

POLARITY-CORRECTING MODE(1)

VIT+ < VID

L

L

Receive valid bus low

VIT– < VID < VIT+

L

?

Indeterminate bus state

VID < VIT–

L

H

Receive polarity corrected bus high

X

H

Z

Receiver disabled

X

OPEN

Z

Receiver disabled

Open, short, idle bus

L

?

Indeterminate bus state

(1)

The polarity-correcting mode is entered when VID < VIT– and t > tFS and DE = low. This state is latched when /RE turns from low to high.

2

Submit Documentation Feedback

Copyright © 2013, Texas Instruments Incorporated

Product Folder Links: SN888C