STM32L4R9ZIT6 datasheet(49/306 Pages) STMICROELECTRONICS

49 / 306 page

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STM32L4R5xx, STM32L4R7xx and STM32L4R9xx

Functional overview

The DSI Host main features are:

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Compliant with MIPI® Alliance standards

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Interface with MIPI® D-PHY

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Supports all commands defined in the MIPI® Alliance specification for DCS:

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Transmission of all Command mode packets through the APB interface

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Transmission of commands in low-power and high-speed during Video Mode

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Supports up to two D-PHY data lanes

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Bidirectional communication and escape mode support through data lane 0

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Supports non-continuous clock in D-PHY clock lane for additional power saving

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Supports Ultra Low-Power mode with PLL disabled

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ECC and Checksum capabilities

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Support for end of transmission packet (EoTp)

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Fault recovery schemes

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Configurable selection of system interfaces:

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AMBA APB for control and optional support for generic and DCS commands

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Video Mode interface through LTDC

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Adapted command mode interface through LTDC

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Independently programmable virtual channel ID in

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Video mode

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Adapted command mode

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APB Slave

Video Mode interfaces features:

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LTDC interface color coding mappings into 24-bit interface:

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16-bit RGB, configurations 1, 2 and 3

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18-bit RGB, configurations 1 and 2

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24-bit RGB

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Programmable polarity of all LTDC interface signals

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Maximum resolution is limited by available DSI physical link bandwidth:

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Number of lanes: 2

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Maximum speed per lane: 500 Mbps

Adapted interface features:

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Support for sending large amounts of data through the memory_write_start (WMS) and

memory_write_continue (WMC) DCS commands

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LTDC interface color coding mappings into 24-bit interface:

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16-bit RGB, configurations 1, 2 and 3

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18-bit RGB, configurations 1 and 2

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24-bit RGB

Video mode pattern generator:

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Vertical and horizontal color bar generation without LTDC stimuli

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BER pattern without LTDC stimuli

STM32L4R9ZIT6 Datasheet(PDF) 49 Page - STMicroelectronics

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