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STM32L4R9ZIT6 Datasheet(PDF) 19 Page - STMicroelectronics |
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STM32L4R9ZIT6 Datasheet(HTML) 19 Page - STMicroelectronics |
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19 / 306 page ![]() DocID030321 Rev 3 19/306 STM32L4R5xx, STM32L4R7xx and STM32L4R9xx Functional overview 64 3.4 Embedded Flash memory The STM32L4Rxxx devices feature 2 Mbytes of embedded Flash memory which is available for storing programs and data. The Flash interface features: – Single or dual bank operating modes – Read-while-write (RWW) in dual bank mode This feature allows to perform a read operation from one bank while an erase or program operation is performed to the other bank. The dual bank boot is also supported. Each bank contains 256 pages of 4 or 8 Kbytes (depending on the read access width). Flexible protections can be configured thanks to the option bytes: • Readout protection (RDP) to protect the whole memory. Three levels of protection are available: – Level 0: no readout protection – Level 1: memory readout protection; the Flash memory cannot be read from or written to if either the debug features are connected or the boot in RAM or bootloader are selected – Level 2: chip readout protection; the debug features (Cortex-M4 JTAG and serial wire), the boot in RAM and the bootloader selection are disabled (JTAG fuse). This selection is irreversible. • Write protection (WRP): the protected area is protected against erasing and programming: – In single bank mode, four areas can be selected with 8-Kbyte granularity. – In dual bank mode, two areas per bank can be selected with 4-Kbyte granularity. Table 3. Access status versus readout protection level and execution modes Area Protection level User execution Debug, boot from RAM or boot from system memory (loader) Read Write Erase Read Write Erase Main memory 1 Yes Yes Yes No No No 2 Yes Yes Yes N/A N/A N/A System memory 1 Yes No No Yes No No 2 Yes No No N/A N/A N/A Option bytes 1 Yes Yes Yes Yes Yes Yes 2 Yes No No N/A N/A N/A Backup registers 1Yes Yes N/A(1) 1. Erased when RDP change from Level 1 to Level 0. No No N/A(1) 2 Yes Yes N/A N/A N/A N/A SRAM2 1 Yes Yes Yes(1) No No No(1) 2 Yes Yes Yes N/A N/A N/A |
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