| Electronic Components Datasheet Search |
|
ZL40262 Datasheet(PDF) 1 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
ZL40262 Datasheet(HTML) 1 Page - Microchip Technology |
|
1 / 36 page ![]() 2024 Microchip Technology Inc. and its subsidiaries. DS20006843A-page 1 Features • One Differential Input which Accepts Any Differen- tial Format • Two Differential HCSL Outputs • Ultra-Low Additive Jitter: 32 fs (in 12 kHz to 20 MHz Integration Band at 400 MHz Clock Fre- quency) • Supports Clock Frequencies from 0 MHz to 400 MHz • Supports 2.5V or 3.3V Power Supplies for HCSL Outputs • Embedded Low Drop Out (LDO) Voltage Regula- tor Provides Superior Power Supply Noise Rejec- tion • Maximum Output to Output Skew of 50 ps • Individual Output Enable Pin for Each Differential Pair • Transfers Spread-Spectrum without Attenuation Applications • PCI Express Generation 1/2/3/4/5 Clock Distribu- tion • UPI/QPI Clock Distribution • Low Jitter Clock Trees • Logic Translation • Clock and Data Signal Restoration • High Performance Microprocessor Clock Distribu- tion • Test Equipment FIGURE 0-1: Functional Block Diagram. ZL40262 Two Output Ultra-Low Additive Phase Noise PCIe, Gen 1 to 5, and UPI/QPI Fanout Buffer |
Similar Part No. - ZL40262 |
|
Similar Description - ZL40262 |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |