TUSB1106-Q1

SCAS916

– AUGUST 2011

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DYNAMIC ELECTRICAL CHARACTERISTICS

– ANALOG I/O PINS (D+, D–)

(1) (2)

Driver Characteristics, Full-Speed Mode

over recommended ranges of operating free-air temperature and supply voltage, VCC = 4 V to 5.5 V or Vreg(3.3) = 3 V to 3.6 V,

VCC(I/O) = 1.65 V to 3.6 V, VGND = 0 V, see Table 10 for valid voltage level combinations, TA = –40°C to 85°C

(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

CL = 50 pF to 125 pF,

tFR

Rise time

4

20

ns

10% to 90% of |VOH – VOL| (see Figure 1)

CL = 50 pF to 125 pF,

tFF

Fall time

4

20

ns

90% to 10% of |VOH – VOL| (see Figure 1)

Differential rise/fall time matching

FRFM

Excluding the first transition from idle state

90

111.1

%

(tFR/tFF)

VCRS

Output signal crossover voltage

Excluding the first transition from idle state (see Figure 10)

1.3

2

V

(1)

Test circuit, see Figure 13

(2)

Driver timing in low-speed mode is not specified. Low-speed delay timings are dominated by the slow rise/fall times tLR and tLF.

DYNAMIC ELECTRICAL CHARACTERISTICS

– ANALOG I/O PINS (D+, D–)

(1) (2)

Driver Characteristics, Low-Speed Mode

over recommended ranges of operating free-air temperature and supply voltage, VCC = 4 V to 5.5 V or Vreg(3.3) = 3 V to 3.6 V,

VCC(I/O) = 1.65 V to 3.6 V, VGND = 0 V, see Table 10 for valid voltage level combinations, TA = –40°C to 85°C

(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

CL = 200 pF to 600 pF,

tLR

Rise time

75

300

ns

10% to 90% of |VOH – VOL| (see Figure 1)

CL = 200 pF to 600 pF,

tLF

Fall time

75

300

ns

90% to 10% of |VOH – VOL| (see Figure 1)

Differential rise/fall time matching

LRFM

Excluding the first transition from idle state

80

125

%

(tLR/tLF)

VCRS

Output signal crossover voltage

Excluding the first transition from idle state (see Figure 10)

1.3

2

V

(1)

Test circuit, see Figure 13

(2)

Driver timing in low-speed mode is not specified. Low-speed delay timings are dominated by the slow rise/fall times tLR and tLF.

DYNAMIC ELECTRICAL CHARACTERISTICS

– ANALOG I/O PINS (D+, D–)

(1) (2)

Driver Timing, Full-Speed Mode

over recommended ranges of operating free-air temperature and supply voltage, VCC = 4 V to 5.5 V or Vreg(3.3) = 3 V to 3.6 V,

VCC(I/O) = 1.65 V to 3.6 V, VGND = 0 V, see Table 10 for valid voltage level combinations, TA = –40°C to 85°C

(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

tPLH(drv)

LOW to HIGH (see Figure 4)

18

Driver propagation delay

ns

(VO/VPO, FSE0/VMO to D+, D

–)

tPHL(drv)

HIGH to LOW (see Figure 4)

18

tPHZ

HIGH to OFF (see Figure 2)

15

Driver disable delay (OE to D+, D

–)

ns

tPLZ

LOW to OFF (see Figure 2)

15

tPZH

OFF to HIGH (see Figure 2)

15

Driver enable delay (OE to D+, D

–)

ns

tPZL

OFF to LOW (see Figure 2)

15

(1)

Test circuit, see Figure ?

(2)

Driver timing in low-speed mode is not specified. Low-speed delay timings are dominated by the slow rise/fall times tLR and tLF.

10

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