TSC2102IDAR datasheet(12/58 Pages) TI2

12 / 58 page

TSC2102

SLAS379A− APRIL 2003 − REVISED JUNE 2004

www.ti.com

OVERVIEW

The TSC2102 is a highly integrated touch screen controller with stereo audio DAC for portable computing, communication,

and entertainment applications. A register-based architecture eases integration with microprocessor-based systems

through a standard SPI bus. All peripheral functions are controlled through the registers and onboard state machines.

The TSC2102 consists of the following blocks (refer to the block diagram):

D Touch Screen Interface

D Battery Monitors

D Auxiliary Input

D Temperature Monitor

D Audio DAC

Communication with the TSC2102 is via standard SPI serial interface. This interface requires that the slave select signal

be driven low to communicate with the TSC2102. Data is then shifted into or out of the TSC2102 under control of the host

microprocessor, which also provides the serial data clock. Control of the TSC2102 and its functions is accomplished by

writing to different registers in the TSC2102. A simple command protocol is used to address the 16-bit registers. Registers

control the operation of the A/D converter and audio DAC.

Control of the TSC2102 and its functions is accomplished by writing to different registers in the TSC2102. A simple

command protocol is used to address the 16−bit registers. Registers control the operation of the A/D converter and audio

DAC.

The TSC2102 audio serial interface is exclusively used by the stereo DAC and supports four audio interface modes (I2S,

DSP, right justified, and left justified) to receive digital audio data from the host processor.

A typical application of the TSC2102 is shown in Figure 9.

AUX

X+

Y+

X−

Y−

Audio

Auxilary Input

Touch

Screen

HPR

VGND

HPL

VBAT1

VBAT2

VREF

MCLK

LRCK

DIN

BCLK

PINTDAV

MISO

MOSI

Master Clock Input

DAC Word Select

Serial Input From CPU/DSP

Serial Clock Input

Pen Interrupt Request to CPU

Serial Output to SPI Master

Serial Input From SPI Master

SPI Slave Select Input

SPI Serial Clock Input

TSC2102

I2S Interface

SPI Interface

V1: Main Battery

V2: Secondary Battery

C1: 1

µF − 10 µF (Optional)

C2: 0.1

µF

R1,R2: 200−300

Ω

Figure 9. Typical Circuit Configuration

TSC2102IDAR Datasheet(PDF) 12 Page - Texas Instruments

TSC2102IDAR Datasheet(HTML) 12 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58

Datasheet Download

Link URL