10kW

OPA177

100W

100W

1/2 REF200

1/2 REF200

V+

R

G

INA129

Ref

V

O

V

IN

V

IN

+

10mV

±

Adjustment Range

V-

100mA

100mA

-

G = 1 +

49.4 kW

¾

R

G

INA129-EP

SBOS508A – DECEMBER 2009 – REVISED DECEMBER 2015

www.ti.com

Typical Application (continued)

8.2.2 Detailed Design Procedure

8.2.2.1 Setting the Gain

Gain is set by connecting a single external resistor, RG, between pins 1 and 8.

(1)

Commonly used gains and resistor values are shown in Figure 16.

The 49.9-k

Ω term in Equation 1 comes from the sum of the two internal feedback resistors of A1 and A2. These

on-chip metal film resistors are laser trimmed to accurate absolute values. The accuracy and temperature

coefficient of these internal resistors are included in the gain accuracy and drift specifications of the INA129-EP.

The stability and temperature drift of the external gain setting resistor, RG, also affects gain. RG’s contribution to

gain accuracy and drift can be directly inferred from Equation 1. Low resistor values required for high gain can

make wiring resistance important. Sockets add to the wiring resistance which will contribute additional gain error

(possibly an unstable gain error) in gains of approximately 100 or greater.

8.2.2.2 Dynamic Performance

Figure 1 shows that, despite its low quiescent current, the INA129-EP achieves wide bandwidth, even at high

gain. This is due to the current-feedback topology of the input stage circuitry. Settling time also remains excellent

at high gain.

8.2.2.3 Offset Trimming

The INA129-EP is laser trimmed for low offset voltage and offset voltage drift. Most applications require no

external offset adjustment. Figure 17 shows an optional circuit for trimming the output offset voltage. The voltage

applied to Ref terminal is summed with the output. The operational amplifier buffer provides low impedance at

the Ref terminal to preserve good common-mode rejection.

Figure 17. Optional Trimming of Output Offset Voltage

8.2.2.4 Input Bias Current Return Path

The input impedance of the INA129-EP is extremely high (approximately 1010

Ω). However, a path must be

provided for the input bias current of both inputs. This input bias current is approximately ±2 nA. High input

impedance means that this input bias current changes very little with varying input voltage.

Input circuitry must provide a path for this input bias current for proper operation. Figure 18 shows various

provisions for an input bias current path. Without a bias current path, the inputs will float to a potential which

exceeds the common-mode range, and the input amplifiers will saturate.

14

Submit Documentation Feedback

Copyright © 2009–2015, Texas Instruments Incorporated

Product Folder Links: INA129-EP