COP8SA

Micro-

Controller

L0(GPI/O)

SI

SK

CS

SI/O

SC

V

+

GND

+3.3 V

0.1 µF

GND (A3)

SC (A2)

SI/O (A1)

(B3) CS

(B1) V

+

LM74

SNIS107K – MAY 2000 – REVISED MARCH 2013

www.ti.com

Connection Diagram

Figure 2. SOIC – Top View

Figure 3. 5-Bump DSBGA – Top View

See Package Number D

See Package Number YTA0005

PIN DESCRIPTIONS

SOIC

DSBGA

Label

Function

Typical Connection

Pin #

Pin #

Slave Input/Output - Serial bus bi-directional data line.

SI/O

1

1

From and to Controller

Schmitt trigger input.

Slave Clock - Serial bus clock Schmitt trigger input

SC

2

5

From Controller

line.

NC

3

No Connection

No Connection

GND

4

4

Power Supply Ground

Ground

NC

5

No Connection

No Connection

NC

6

No Connection

No Connection

CS

7

3

Chip Select input.

From Controller

DC Voltage from 3.0V to 5.5V for the LM74CIM

and 2.65V to 5.5V for the LM74CIBP and

V+

8

2

Positive Supply Voltage Input

LM74CITP. Bypass with a 0.1

μF ceramic

capacitor.

Typical Application

Figure 4. COP Microcontroller Interface

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

2

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