1

ISENSE

8

VIN

2

GND

7

PGATE

3

EN

6

PGND

4

FB

5

ADJ

Not to scale

3

LM3489, LM3489-Q1

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SNVS443C – MAY 2006 – REVISED DECEMBER 2016

Product Folder Links: LM3489 LM3489-Q1

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5 Pin Configuration and Functions

DGK Package

8-Pin VSSOP

Top View

Pin Functions

PIN

I/O

DESCRIPTION

NO.

NAME

1

ISENSE

I

The current sense input pin. This pin must be connected to the PFET drain terminal directly or

through a series resistor up to 600 Ω for 28 V > VIN > 35 V.

2

GND

—

Signal ground

3

EN

I

Enable pin. Connect EN pin to ground to shutdown the part or float to enable operation (Internally

pulled high). This pin can also be used to perform UVLO function.

4

FB

I

The feedback input. Connect the FB to a resistor voltage divider between the output and GND for an

adjustable output voltage.

5

ADJ

I

Current limit threshold adjustment. Connected to an internal 5.5-µA current source. A resistor is

connected between this pin and VIN. The voltage across this resistor is compared with the ISENSE

pin voltage to determine if an overcurrent condition has occurred.

6

PGND

—

Power ground

7

PGATE

O

Gate drive output for the external PFET. PGATE swings between VIN and VIN 5-V.

8

VIN

I

Power supply input pin