VIH

VIL

SMBCLK

P

S

VIH

VIL

SMBDAT

tBUF

tHD;STA

tLOW

tR

tHD;DAT

tHIGH

tF

tSU;DAT

tSU;STA

tSU;STO

P

S

LM95245

www.ti.com

SNIS148G – OCTOBER 2007 – REVISED MARCH 2013

SMBus Digital Switching Characteristics

Unless otherwise noted, these specifications apply for VDD= +3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines = 80

pF. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C, unless otherwise noted.

The switching characteristics of the LM95245 fully meet or exceed the published specifications of the SMBus version 2.0. The

following parameters are the timing relationships between SMBCLK and SMBDAT signals related to the LM95245. They

adhere to, but are not necessarily, the SMBus specifications.

Unit

Parameter

Test Conditions

Typ(1)

Limits(2)

(Limit)

100

kHz (max)

fSMB

SMBus Clock Frequency

10

kHz (min)

4.7

µs (min)

tLOW

SMBus Clock Low Time

from VIN(0)max to VIN(0)max

25

ms (max)

tHIGH

SMBus Clock High Time

from VIN(1)min to VIN(1)min

4.0

µs (min)

tR,SMB

SMBus Rise Time

(3)

1

µs (max)

tF,SMB

SMBus Fall Time

(4)

0.3

µs (max)

CL = 400 pF,

tOF

Output Fall Time

250

ns (max)

IO = 3 mA,

(4)

SMBDAT and SMBCLK Time Low for Reset of

25

ms (min)

tTIMEOUT

Serial Interface (5)

35

ms (max)

tSU;DAT

Data In Setup Time to SMBCLK High

250

ns (min)

300

ns (min)

tHD;DAT

Data Out Stable after SMBCLK Low

1075

ns (max)

Start Condition SMBDAT Low to SMBCLK Low

tHD;STA

(Start condition hold before the first clock falling

100

ns (min)

edge)

Stop Condition SMBCLK High to SMBDAT Low

tSU;STO

100

ns (min)

(Stop Condition Setup)

SMBus Repeated Start-Condition Setup Time,

tSU;STA

0.6

µs (min)

SMBCLK High to SMBDAT Low

SMBus Free Time Between Stop and Start

tBUF

1.3

µs (min)

Conditions

(1)

Typical figures are at TA = 25°C and represent most likely parametric norms at the time of product characterization. The typical

specifications are not guaranteed.

(2)

Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level).

(3)

The output rise time is measured from (VIN(0)max - 0.15V) to (VIN(1)min + 0.15V).

(4)

The output fall time is measured from (VIN(1)min + 0.15V) to (VIN(0)max - 0.15V).

(5)

Holding the SMBDAT and/or SMBCLK lines Low for a time interval greater than tTIMEOUT will reset the LM95245's SMBus state machine,

therefore setting SMBDAT and SMBCLK pins to a high impedance state.

Figure 2. SMBus Communication

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