BUS

MASTER

400 kHz

SDA

SCL

5 k

5 k

EN

SDAA

SCLA

SDAB

SCLB

VCCA VCCB

TCA980x

SDA

SCL

SLAVE

400 kHz

2.5 V

Copyright © 2017, Texas Instruments Incorporated

tr - Rise Time (ns)

0

50

100

150

200

250

300

0

100

200

300

400

D001

VCCB = 3.6 V

TCA9800

TCA9801

TCA9802

TCA9803

23

TCA9803

www.ti.com

SCPS267B – MARCH 2017 – REVISED FEBRUARY 2020

Product Folder Links: TCA9803

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Copyright © 2017–2020, Texas Instruments Incorporated

Figure 28. Maximum Load Capacitance vs Rise Time (400-kHz I2C, VCCB = 3.6 V)

10.2.2 Buffering Without Level-Shifting

The TCA980x family supports buffering use cases which do not need level-shifting or voltage-translation.

It is critical to note that there are no external sources of current allowed on the B-side ports, since this can affect

device operation as shown in the IEXT-I section.

Figure 29. Buffering Use Case Without Level-Shifting

NOTE

Decoupling capacitors are not shown to keep the illustration simple. Decoupling capacitors

(1 µF and 0.1 µF) must be placed close to each power supply pin.

10.2.2.1 Design Requirements

The system designer must first select the correct variant of the TCA980x family for the load. In order to do this,

the information in Table 7 must be known. The setup in Figure 29 is used for these example design

requirements.

Table 7. Design Requirements

Parameter

Description

Acceptable Range

Example Value/Target

CL

Load capacitance (bus capacitance) on B-

side

up to 400 pF

200 pF

tr

Rise time

up to 300 ns

≤ 300 ns