LP8754 datasheet(22/52 Pages) TI2

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Time

VOUT

tMASK, RAMP

tMASK, START

LP8754

SNVS861A – FEBRUARY 2014 – REVISED AUGUST 2014

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7.3.4 Diagnosis and Protection Features

The LP8754 is capable of providing two levels of protection features: warnings for diagnosis and faults which are

causing the converters to shut down. When the device detects warning or fault conditions, the LP8754 sets the

flag bits indicating which fault or warning conditions have occurred; the INT pin will be pulled low. INT will be

released again after a clear of flags is complete. The flag bits are persistent over reset to allow for the system to

identify what was causing the interrupt and/or converter shutdown.

Also, the LP8754 has a soft-start circuit that limits in-rush current during start-up. The output voltage increase

rate is 30 mV/µs (default) during soft-start.

Table 3. Summary of Exceptions and Interrupt Signals

EVENT

INTERRUPT SIGNAL

INT MASK AVAILABLE?

PRODUCED?

SCP triggered

FLAGS_1.SCP

Yes

Not PowerGood

FLAGS_0.nPG_B0

Yes

TEMP status change

FLAGS_0.TEMP[1:0]

On any temperature change

Yes

except for the case when

TEMP[1:0] = 0b11

Thermal warning

FLAGS_1.T_WARNING

Yes

Thermal shutdown

FLAGS_1.THSD

Yes

OVP triggered

FLAGS_1.OVP

Yes

Load current measurement

FLAGS_1.I_LOAD_READY

Yes

ready

UVLO triggered

FLAGS_1.UVLO

Yes

7.3.4.1 Warnings for Diagnosis (No Power Down)

7.3.4.1.1

Short-Circuit Protection (SCP)

A short-circuit protection feature allows the LP8754 to protect itself and external components during overload

conditions. The output short-circuit fault threshold is 400 mV (typ.) .

7.3.4.1.2

Power Good Monitoring

When the converter's feedback-pin voltage falls lower than 90% (typ.) of the set voltage, the FLAGS_0.nPG_B0

flag is set. To prevent a false alarm, the power good circuit is masked during converter start-up and voltage

transitions. The duration of the power good mask is set to 400 µs for converter start-up. For voltage ramps the

masking time is extended by an internal logic circuit up to 6.4 ms. (See Protection Features Characteristics.)

Masking time for start-up is constant 400 µs (typ.). Masking time for voltage transitions depends on the selected ramp

rates.

Figure 16. Power Good Masking Principle

7.3.4.1.3

Thermal Warnings

Prior to the thermal shutdown, thermal warnings are set. The first warning is set at 85°C (INT pin low), and the

second at 120°C (INT pin pulled low and FLAGS_1.T_WARNING flag set). If the chip temperature crosses any of

the thresholds of 85°C, 120°C, or 150°C (see FLAGS_0 register) the INT pin will be triggered. INT will be cleared

upon read of FLAGS_0.TEMP[1:0] bits except if FLAGS_0.TEMP [1:0] = 0b11, which is a thermal fault event.

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