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LP8754 Datasheet(PDF) 31 Page - Texas Instruments |
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LP8754 Datasheet(HTML) 31 Page - Texas Instruments |
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31 / 52 page ![]() LP8754 www.ti.com SNVS861A – FEBRUARY 2014 – REVISED AUGUST 2014 7.6.8 BUCK4_CTRL Address: 0x0B D7 D6 D5 D4 D3 D2 D1 D0 OC_LEV_B4[1:0] Reserved Bits Field Type Default Description 7:6 OC_LEV_B4[1:0] R/W 10 Inductor positive current limit on Buck 4. Note that OC_LEV_B0...B5 should have the same value. 00 = 1.5 A 01 = 2.0 A 10 = 2.5 A 11 = 3.0 A 5:0 Reserved R/W 01 0001 7.6.9 BUCK5_CTRL Address: 0x0C D7 D6 D5 D4 D3 D2 D1 D0 OC_LEV_B5[1:0] Reserved Bits Field Type Default Description 7:6 OC_LEV_B5[1:0] R/W 10 Inductor positive current limit on Buck 5. Note that OC_LEV_B0...B5 should have the same value. 00 = 1.5 A 01 = 2.0 A 10 = 2.5 A 11 = 3.0 A 5:0 Reserved R/W 01 0001 7.6.10 FLAGS_0 Address: 0x0D D7 D6 D5 D4 D3 D2 D1 D0 Reserved nPG_B0 TEMP[1:0] Bits Field Type Default Description 7:3 Reserved R/W X XXXX 2 nPG_B0 R/W 0 Flag Bit (1) Power good fault flag for VOUT rail 1 = Power fault detected 0 = Power good 1:0 TEMP[1:0] R 00 indicates the die temperature as follows: 00: die temperature lower than 85ºC 01: 85ºC ≤ die temperature < 120ºC 10: 120ºC ≤ die temperature < 150ºC 11: die temperature 150ºC or higher (1) The flag bit can be cleared only by writing a zero to the associated register bit or power cycling the device (VVIOSYS to LOW). Reading or RESET does not clear the flag bits. After clearing, the nPG_B0 fault flag will be raised again '1' if the fault condition persists. Any unmasked flag bit High will cause the interrupt to be asserted on the INT pin. The INT pin will be pulled Low until all the unmasked flags are clear again. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 31 Product Folder Links: LP8754 |
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