STM32WL33C8V datasheet(71/91 Pages) STMICROELECTRONICS

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6.3.21

SPI characteristics

The parameters given in Table 64 for SPI are derived from tests performed according to fPCLKx frequency and

supply voltage conditions summarized in Table 10. Operating range.

•

Output speed is set to OSPEEDRy[1:0] = 11

•

Capacitive load C = 30 pF

•

Measurement points are done at CMOS levels: 0.5 x VDD

Table 64. SPI characteristics

Symbol

Parameter(1)

Conditions

Min.

Typ.

Max.

Units

fSCK

SPI clock frequency

Master mode

MHz

Slave mode

32(1)

tsu(NSS)

NSS setup time

4 / fPCLK

th(NSS)

NSS hold time

2 / fPCLK

tw(SCKH)

tw(SCKL)

SCK high and low time

Master mode

1/ fPCLK -1.5

1/ fPCLK

1/ fPCLK + 1

tsu(MI)

Data input setup time

Master mode

tsu(SI)

Data input setup time

Slave mode

th(MI)

Data input hold time

Master mode

th(SI)

Slave mode

ta(SO)

Data output access time

Slave mode

tdis(SO)

Data output disable time

tv(MO)

Data output valid time

Master mode

tv(SO)

Slave mode

th(MO)

Data output hold time

Master mode

th(SO)

Slave mode

1. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI), which has to fit into SCK low

or high phase preceding the SCK sampling edge. This value can be achieved .

Figure 16. SPI timing diagram - slave mode and CPHA = 0

STM32WL33xx

Electrical characteristics

DS14221 - Rev 5

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