STM32WL33C8V datasheet(20/91 Pages) STMICROELECTRONICS

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3.8.1

System clock details

The HSI and the PLL64M clocks are provided by the same analog block which can synthesize:

•

a non-accurate clock (target is 1% typical) when no external XO provides an input clock to this block

•

an accurate clock when the external XO provides the 48 MHz and once its internal PLL is locked.

The use of PLL64M or HSE as clock source is mandatory for sub-1 GHz radio operations (because a high

accuracy clock is needed).

This fast clock source is used to generate all the fast clock of the device through dividers as shown in Figure 8.

After reset, the CLK_SYS is divided by four to provide a 16 MHz to the whole system (CPU, DMA, memories, and

peripherals). Then the software can program another system clock frequency (CLK_SYS) in the following way

using the RCC_CFGR.CLKSYSDIV bits:

•

000: CLK_SYS is CLK_ROOT

•

001: CLK_SYS is CLK_ROOT/2

•

010: CLK_SYS is CLK_ROOT/4 (HSESEL = 0) or CLK_ROOT/3 (HSESEL = 1)

•

011: CLK_SYS is CLK_ROOT/8 (HSESEL = 0) or CLK_ROOT/6 (HSESEL = 1) (forbidden when radio is in

use)

•

100: CLK_SYS is CLK_ROOT/16 (HSESEL = 0) or CLK_ROOT/12 (HSESEL = 1) (forbidden when radio or

ADC is in use)

•

101: CLK_SYS is CLK_ROOT/32 (HSESEL = 0) or CLK_ROOT/24 (HSESEL = 1) (forbidden when radio or

ADC is in use)

•

110: CLK_SYS is CLK_ROOT/64 (HSESEL = 0) or CLK_ROOT/48 (HSESEL = 1) (forbidden when radio or

ADC is in use)

Forbidden configuration means that the “in use” feature cannot work if the system clock runs at this frequency.

Special care must be taken when programming the CLK_SYS as some constraints need to be respected:

CLK_SYS frequency must be greater or equal to CLK_MR_SUBGHz.

3.9

Boot mode

Following CPU boot, the application software can modify the memory map at address 0x0000 0000. This

modification is performed by programming the REMAP bit in the flash controller. The following memory can be

remapped:

•

main flash memory SRAM0 memory

The STM32WL33xx SOC has a pre-programmed bootloader supporting USART protocol with automatic baud rate

detection. The main features of the embedded bootloader are:

•

auto baud rate detection up to 1 Mbps

•

flash mass erase, section erase

•

flash programming

•

flash readout protection enable/disable

The pre-programmed bootloader is an application, which is stored in the STM32WL33xx internal ROM at

manufacturing time by STMicroelectronics. This application allows upgrading the device flash memory with a user

application using a serial communication channel (USART).

The bootloader is activated by hardware by forcing PA10 high during hardware reset, otherwise, application

residing in flash memory is launched.

STMicroelectronics provides a boot loader executed after each CPU reboot. This boot loader has its own

documentation.

STM32WL33xx

Functional overview

DS14221 - Rev 5

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