DAC7678SPW datasheet(13/57 Pages) TI2

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= 5.5 V,

Clock Feedthrough Impulse ~1.5 nV-s

Internal Reference Enabled

t - Time - 1

s/div

- 5 mV/div

OUT

SCL - 5 V/div

- 2 mV/div

OUT

- 2 V/div

= 5.5 V,

DAC Unloaded,

DAC at Zero Scale

t - Time - 10 ms/div

~2 mV

Zoomed Falling Edge

100 V/div

Falling Edge

2 V/div

Trigger Pulse

5 V/div

= 5.5 V,

From Code C00h to 400h

Internal Reference Enabled

t - Time - 5

s/div

Zoomed Rising Edge

100 V/div

Rising Edge

2 V/div

Trigger Pulse

5 V/div

= 5.5 V,

From Code 400h to C00h

Internal Reference Enabled

t - Time - 5

s/div

Zoomed Rising Edge

100 V/div

Rising Edge

2 V/div

Trigger Pulse

5 V/div

= 5.5 V,

From Code 000h to FFFh,

Internal Reference Enabled

t - Time - 5

s/div

Zoomed Falling Edge

100 V/div

Falling Edge

2 V/div

Trigger Pulse

5 V/div

= 5.5 V,

From Code FFFh to 000h

Internal Reference Enabled

t - Time - 5

s/div

DAC7678

www.ti.com

SBAS493C – FEBRUARY 2010 – REVISED JANUARY 2014

TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V (continued)

At TA = 25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, unless

otherwise noted

FULL-SCALE SETTLING TIME:

5V RISING EDGE

5V FALLING EDGE

Figure 37.

Figure 38.

HALF-SCALE SETTLING TIME:

5V RISING EDGE

5V FALLING EDGE

Figure 39.

Figure 40.

CLOCK FEEDTHROUGH

POWER-ON GLITCH

400 kHz, MIDSCALE

RESET TO ZERO SCALE

Figure 41.

Figure 42.

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