SC16C852LIB datasheet(12/63 Pages) NXP

12 / 63 page

SC16C852L_3

Product data sheet

Rev. 03 — 18 January 2008

12 of 63

NXP Semiconductors

SC16C852L

1.8 V dual UART with 128-byte FIFOs and IrDA encoder/decoder

The SC16C852L is capable of operation up to 5 Mbit/s with an external 80 MHz clock.

With a crystal, the SC16C852L is capable of operation up to 1.5 Mbit/s.

The rich feature set of the SC16C852L is available through internal registers. These

features are: selectable and programmable receive and transmit FIFO trigger levels,

selectable TX and RX baud rates, and modem interface controls, and are all standard

features. Following a power-on reset, an external reset, or a software reset, the

SC16C852L is software compatible with the previous generation, SC16C2550,

SC16C652B, and ST16C2450.

6.1 UART A-B functions

The UART provides the user with the capability to bidirectionally transfer information

between an external CPU, the SC16C852L package, and an external serial device. A

logic 0 (LOW) on chip select pins CSA and/or CSB allows the user to conﬁgure, send

data, and/or receive data via UART channels A, B. Individual channel select functions are

shown in Table 3 and Table 4.

6.2 Extended mode (128-byte FIFO)

The device is in the extended mode when any of these four registers contains any value

other than 0: FLWCNTH, FLWCNTL, TXINTLVL, RXINTLVL.

Table 3.

Serial port selection (Intel interface)

H = HIGH; L = LOW.

Chip Select

Function

CSA = H, CSB = H

none

CSA = L

UART channel A

CSB = L

UART channel B

Table 4.

Serial port selection (Motorola interface)

H = HIGH; L = LOW.

Chip Select

Function

CS = H

none

CS = L, A3 = L

UART channel A

CS = L, A3 = H

UART channel B

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