ISO1430DWR datasheet(4/49 Pages) TI2

4 / 49 page

Pin Functions: Half-Duplex Device

CC1

CC2

GND1

GND2

GND1

GND2

Not to scale

Figure 6-2. DW Package 16-Pin SOIC Half-Duplex Device Top View

Type(1)

DESCRIPTION

NAME

NO.

I/O

Transceiver non-inverting input or output (I/O) on the bus side

I/O

Transceiver inverting input or output (I/O) on the bus side

Driver input

Driver enable. This pin enables the driver output when high and disables the driver

output when low or open.

GND1(2)

—

Ground connection for VCC1

GND1(2)

—

Ground connection for VCC1

GND2(2)

—

Ground connection for VCC2

GND2(2)

—

Ground connection for VCC2

NC(3)

—

No internal connection

NC(3)

—

No internal connection

NC(3)

—

No internal connection

NC(3)

—

No internal connection

Receiver output

Receiver enable. This pin disables the receiver output when high or open and enables

the receiver output when low.

VCC1

—

Logic-side power supply

VCC2

—

Transceiver-side power supply

(1)

I = Input, O = Output, I/O = Input or Output

(2)

For Logic side, both Pin 2 and Pin 8 must be connected to GND1. For Bus side, both Pin 9 and Pin 15 must be connected to GND2.

(3)

Device functionality is not affected if NC pins are connected to supply or ground on PCB

ISO1450, ISO1452, ISO1410, ISO1412, ISO1430, ISO1432

SLLSF22H – APRIL 2018 – REVISED JUNE 2024

www.ti.com

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Product Folder Links: ISO1450 ISO1452 ISO1410 ISO1412 ISO1430 ISO1432

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