SN74LVC1G32DBVR datasheet(13/50 Pages) TI2

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VCC

Unused Input

Input

Output

Input

Unused Input

Frequency - MHz

-20

-2

D003

Icc 1.8V

Icc 2.5V

Icc 3.3V

Icc 5V

SN74LVC1G32

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SCES219V – APRIL 1999 – REVISED AUGUST 2015

Product Folder Links: SN74LVC1G32

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Typical Application (continued)

9.2.3 Application Curves

Figure 5. ICC vs Frequency

10 Power Supply Recommendations

The power supply can be any voltage between the min and max supply voltage rating located in the

Recommended Operating Conditions table.

Each VCC pin should have a good bypass capacitor to prevent power disturbance. For devices with a single

supply, a 0.1-

μF capacitor is recommended. If there are multiple VCC pins, then a 0.01-μF or 0.022-μF capacitor

is recommended for each power pin. It is ok to parallel multiple bypass capacitors to reject different frequencies

of noise. A 0.1-

μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be installed

as close to the power pin as possible for best results.

11 Layout

11.1 Layout Guidelines

When using multiple bit logic devices inputs should not ever float.

In many cases, functions or parts of functions of digital logic devices are unused; for example, when only two

inputs of a triple-input AND gate are used, or only 3 of the 4 buffer gates are used. Such input pins should not be

left unconnected because the undefined voltages at the outside connections result in undefined operational

states.

Specified in Layout Example are the rules that must be observed under all circumstances. All unused inputs of

digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that

should be applied to any particular unused input depends on the function of the device. Generally they will be

tied to GND or VCC, whichever make more sense or is more convenient.

11.2 Layout Example

SN74LVC1G32DBVR Datasheet(PDF) 13 Page - Texas Instruments

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