SN74LVC244A Octal Buffer or Driver with 3-State Outputs

1 Features

• Operates from 1.65V to 3.6V

• Inputs accept voltages to 5.5V

• Specified from –40°C to +85°C and

–40°C to +125°C

• Maximum tpd of 5.9ns at 3.3V

• Typical VOLP (output ground bounce)

< 0.8V at VCC = 3.3V, TA = 25°C

• Typical VOHV (output VOH undershoot)

> 2V at VCC = 3.3V, TA = 25°C

• Supports mixed-mode signal operation on

all ports (5V input or output voltage with

3.3V VCC)

• Ioff supports live insertion, partial-power-down

mode, and back-drive protection

• Can be used as a down translator to translate

inputs from a maximum of 5.5V down

to the VCC level

• Available in ultra small logic QFN package (0.5mm

maximum height)

• Latch-up performance exceeds 250mA per

JESD 17

2 Applications

• Servers

• LED displays

• Network switches

• Telecom infrastructure

• Motor drivers

• I/O expanders

• Enable or disable a digital signal

• Controlling an indicator LED

• Translation between communication modules and

system controllers

3 Description

These octal bus buffers are designed for 1.65V to

3.6V VCC operation. The SN74LVC244A devices are

designed for asynchronous communication between

data buses.

Package Information

PART NUMBER

PACKAGE(1)

PACKAGE SIZE(2)

BODY SIZE(3)

SN74LVC244A

RKS (VQFN, 20)

4.50mm × 2.50mm

4.50mm × 2.50mm

N (PDIP, 20)

24.33mm × 9.4mm

24.33mm × 6.35mm

NS (SOP, 20)

12.60mm × 7.8mm

12.60mm × 5.30mm

DB (SSOP, 20)

7.2mm × 7.8mm

7.2mm × 5.30mm

DGV (TVSOP, 20)

5.00mm × 6.4mm

5.00mm × 4.4mm

DW (SOIC, 20)

12.80mm × 10.3mm

12.80mm × 7.50mm

RGY (VQFN, 20)

4.50mm × 3.50mm

4.50mm × 3.50mm

ZQN (BGA, 20)

4.00mm × 3.00mm

4.00mm × 3.00mm

PW (TSSOP, 20)

6.50mm × 6.4mm

6.50mm × 4.40mm

RWP (X1QFN, 20)

3.30mm × 2.50mm

3.30mm × 2.50mm

(1)

For more information, see Mechanical, Packaging, and

Orderable Information.

(2)

The package size (length × width) is a nominal value and

includes pins, where applicable.

(3)

The body size (length × width) is a nominal value and does

not include pins.

xA2

xA3

xA4

One of Two 4-Bit Bus Buffers

xA1

xOE

xY1

xY2

xY3

xY4

Logic Diagram (Positive Logic)

SN74LVC244A

SCAS414AE – NOVEMBER 1992 – REVISED AUGUST 2025

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.