 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TAS5713PHPR.A Datasheet(PDF) 28 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
TAS5713PHPR.A Datasheet(HTML) 28 Page - Texas Instruments |
|
|
28 / 72 page  23 22 SCLK 32Clks LRCLK LeftChannel 24-BitMode 1 20-BitMode 16-BitMode 15 14 MSB LSB SCLK 32Clks RightChannel 2-ChannelRight-Justified(SonyFormat)StereoInput T0034-03 19 18 1 19 18 1 0 0 0 15 14 15 14 23 22 1 15 14 MSB LSB 19 18 1 19 18 1 0 0 0 15 14 15 14 TAS5713 SLOS637A – DECEMBER 2009 – REVISED AUGUST 2010 www.ti.com it is for the right channel. LRCLK is high for the left channel and low for the right channel. A bit clock running at 32, 48, or 64 × fS is used to clock in the data. The first bit of data appears on the data 8 bit-clock periods (for 24-bit data) after LRCLK toggles. In RJ mode, the LSB of data is always clocked by the last bit clock before LRCLK transitions. The data is written MSB-first and is valid on the rising edge of bit clock. The DAP masks unused leading data bit positions. Figure 38. Right-Justified 64-fS Format 28 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): TAS5713 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
