TAS5713PHPR.A datasheet(6/72 Pages) TI2

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SSTIMER

PLL_FLTP

VR_ANA

PBTL

AVSS

PLL_FLTM

BST_A

PVDD_A

OUT_A

RESET

PVDD_A

STEST

DVDD

DVSS

GND

VREG

PVDD_D

BST_D

OUT_D

AGND

PVDD_D

GVDD_OUT

P0075-09

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TAS5713

SLOS637A – DECEMBER 2009 – REVISED AUGUST 2010

www.ti.com

DEVICE INFORMATION

PIN ASSIGNMENT

PIN FUNCTIONS

5-V

TYPE(1)

TERMINATION(2)

DESCRIPTION

TOLERANT

NAME

NO.

AGND

Local analog ground for power stage

A_SEL_FAULT

DIO

This pin is monitored on the rising edge of RESET. A value of 0

(15-k

Ω pulldown) sets the I2C device address to 0x34 and a value of

1 (15-k

Ω pullup) sets it to 0x36. this dual-function pin can be

programmed to output internal power-stage errors.

AVDD

3.3-V analog power supply

AVSS

Analog 3.3-V supply ground

BST_A

High-side bootstrap supply for half-bridge A

BST_B

High-side bootstrap supply for half-bridge B

BST_C

High-side bootstrap supply for half-bridge C

BST_D

High-side bootstrap supply for half-bridge D

DVDD

3.3-V digital power supply

DVSS

Digital ground

(1)

TYPE: A = analog; D = 3.3-V digital; P = power/ground/decoupling; I = input; O = output

(2)

All pullups are weak pullups and all pulldowns are weak pulldowns. The pullups and pulldowns are included to assure proper input logic

levels if the pins are left unconnected (pullups

→ logic 1 input; pulldowns → logic 0 input).

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