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TPA3136D2 Datasheet(PDF) 17 Page - Texas Instruments |
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TPA3136D2 Datasheet(HTML) 17 Page - Texas Instruments |
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17 / 41 page ![]() 7.3 Feature Description 7.3.1 Analog Gain The analog gain of the TPA3139D2 can be changed by GAIN_SEL pin. Low Level, Gain = 20 dB; High Level, Gain = 26 dB. 7.3.2 SD/ FAULT and MUTE Operation The TPA3139D2 device employs a shutdown mode of operation designed to reduce supply current (ICC) to the absolute minimum level during periods of nonuse for power conservation. The SD/ FAULT input pin should be held high (see Section 6 table for trip point) during normal operation when the amplifier is in use. Pulling SD/ FAULT low causes the outputs to mute and the amplifier to enter a low-current state. Never leave SD/ FAULT unconnected, because the amplifier operation would be unpredictable. For the best power-off pop performance, place the amplifier in the shutdown or mute mode prior to removing the power supply voltage. For some single ended input application case, suggest to mute the device first then release SD/ FAULT, then umute the output. This sequence power-up sequence with best pop performance. 7.3.3 PLIMIT If selected, the PLIMIT operation limits the output voltage to a level below the supply rail. If the amplifier operates like it is powered by a lower supply voltage, then it limits the output power by voltage clipping. Add a resistor divider from GVDD to ground to set the threshold voltage at the PLIMIT pin. Figure 7-1. PLIMIT Circuit Operation The PLIMIT circuit sets a limit on the output peak-to-peak voltage. The limiting is done by limiting the duty cycle to a fixed maximum value. The limit can be thought of as a "virtual" voltage rail which is lower than the supply connected to PVCC. The "virtual" rail is approximately 5.7 times (with BD mode) and 11.4 times (with 1SPW mode) the voltage at the PLIMIT pin. The output voltage can be used to calculate the maximum output power for a given maximum input voltage and speaker impedance. 2 L P L S OUT L R V R + 2 R P = for unclipped power 2 R æ ö æ ö ´ ç ÷ ç ÷ ç ÷ ´ è ø è ø ´ (1) where • POUT (10%THD) = 1.25 × POUT (unclipped) • RL is the load resistance. • RS is the total series resistance including RDS(on), and output filter resistance. • VP is the peak amplitude, which is limited by "virtual" voltage rail. www.ti.com TPA3139D2 SLOS810A – OCTOBER 2019 – REVISED AUGUST 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: TPA3139D2 |
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