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ADEMA124ACPZ Datasheet(PDF) 2 Page - Analog Devices

Part # ADEMA124ACPZ
Description  Simultaneously Sampling 4- and 7-Channel ΣΔ ADC with SPI
PDF  78 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADEMA124ACPZ Datasheet(HTML) 2 Page - Analog Devices

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Data Sheet
ADEMA124/ADEMA127
TABLE OF CONTENTS
analog.com
Rev. A | 2 of 78
Features................................................................ 1
Applications........................................................... 1
General Description...............................................1
Functional Block Diagrams....................................3
Specifications........................................................ 4
Bandwidth and Pass-Band Flatness.................. 7
Timing Characteristics........................................8
Absolute Maximum Ratings...................................9
Thermal Resistance........................................... 9
ESD Caution.......................................................9
Pin Configurations and Function Descriptions.....10
Typical Performance Characteristics................... 12
Test Circuit...........................................................18
Terminology......................................................... 19
Theory of Operation.............................................20
Gain and Offset Correction...............................20
Quick Start Guide............................................. 20
Applications Information...................................... 21
Start-Up Sequence and Timing........................ 21
Modes of Operation..........................................22
SPI Compatible Communication...................... 25
Datapath Configuration.................................... 33
Configuration Procedure.................................. 39
Status Registers and IRQ.................................40
CRC Protection................................................ 41
Sensor to ADC Interface.................................. 43
Crystal Oscillator/External Clock...................... 44
Synchronization of Multiple Devices.................45
Power Consumption.........................................46
Polyphase Energy Meters................................ 47
Split Phase Energy Meters...............................49
Hardware Identifiers............................................ 50
SPI Accessible Addresses...................................51
Register Summary...............................................52
Register Details................................................... 55
DSP RAM Summary............................................70
DSP RAM Details................................................ 73
Outline Dimensions............................................. 78
Ordering Guide.................................................78
Evaluation Boards............................................ 78
REVISION HISTORY
11/2025—Rev. 0 to Rev. A
Changes to General Description Section.........................................................................................................1
Changes to ADC Gain Drift over Temperature Parameter; ADC Transfer Function Parameter; and
Signal-to-Noise Ratio (SNR), 2x Gain Parameter, Table 2............................................................................ 4
Changes to Table 3..........................................................................................................................................7
Changes to Figure 14 Caption and Figure 15 Caption.................................................................................. 13
Changes to Figure 27 Caption....................................................................................................................... 15
Added Figure 28 and Figure 29; Renumbered Sequentially..........................................................................15
Changes to Figure 31 Caption and Figure 36 Caption.................................................................................. 16
Change to Figure 37 Caption.........................................................................................................................17
Change to Figure 38...................................................................................................................................... 18
Changes to Software Reset Section.............................................................................................................. 24
Changes to Hardware Reset Section.............................................................................................................24
Changes to ADC Transfer Function Section..................................................................................................35
Changes to Digital Low-Pass Filter (LPF) Section.........................................................................................38
Changes to Sinc Compensation Filter Section.............................................................................................. 38
Changes to Digital High-Pass Filter (HPF) Section....................................................................................... 38
Changes to Digital Integrator and All Pass Filter Section.............................................................................. 39
Changes to Anti-Aliasing Filters Section and Figure 63.................................................................................43
Changes to Figure 66.................................................................................................................................... 44
Change to Table 28........................................................................................................................................52
Changes to Table 30......................................................................................................................................58
7/2025—Revision 0: Initial Version



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