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TUSB1210 Datasheet(PDF) 44 Page - Texas Instruments |
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TUSB1210 Datasheet(HTML) 44 Page - Texas Instruments |
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44 / 72 page ![]() 7.5.26 VENDOR_SPECIFIC1 ADDRESS OFFSET 0x3D PHYSICAL ADDRESS 0x3D INSTANCE USB_SCUSB DESCRIPTION Power Control register. TYPE RW WRITE LATENCY 7 6 5 4 3 2 1 0 SPARE MNTR_VUSBIN _OK_EN ID_FLOAT_EN ID_RES_EN BVALID_FALL BVALID_RISE SPARE ABNORMALST RESS_EN BITS FIELD NAME DESCRIPTION TYPE RESET 7 SPARE Reserved. The link must never write a 1b to this bit. RW 0 6 MNTR_VUSBIN_OK_EN When set to 1, it enables RX CMDs for high to low or low to high transitions on MNTR_VUSBIN_OK. This bit is provided for debugging purposes. RW 0 5 ID_FLOAT_EN When set to 1, it enables RX CMDs for high to low or low to high transitions on ID_FLOAT. This bit is provided for debugging purposes. RW 0 4 ID_RES_EN When set to 1, it enables RX CMDs for high to low or low to high transitions on ID_RESA, ID_RESB and ID_RESC. This bit is provided for debugging purposes. RW 0 3 BVALID_FALL Enables RX CMDs for high to low transitions on BVALID. When BVALID changes from high to low, the USB TRANS will send an RX CMD to the link with the alt_int bit set to 1b. RW 0 This bit is optional and is not necessary for OTG devices. This bit is provided for debugging purposes. Disabled by default. 2 BVALID_RISE Enables RX CMDs for low to high transitions on BVALID. When BVALID changes from low to high, the USB Trans will send an RX CMD to the link with the alt_int bit set to 1b. RW 0 This bit is optional and is not necessary for OTG devices. This bit is provided for debugging purposes. Disabled by default. 1 SPARE Reserved. The link must never write a 1b to this bit. RW 0 0 ABNORMALSTRESS_E N When set to 1, it enables RX CMDs for low to high and high to low transitions on ABNORMALSTRESS. This bit is provided for debugging purposes. RW 0 TUSB1210 SLLSE09J – NOVEMBER 2009 – REVISED JULY 2021 www.ti.com 44 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TUSB1210 |
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