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CC115LRGPR.B Datasheet(PDF) 53 Page - Texas Instruments

Part # CC115LRGPR.B
Description  CC115L Value Line Transmitter
PDF  74 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

CC115LRGPR.B Datasheet(HTML) 53 Page - Texas Instruments

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CC115L
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SWRS105B – MAY 2011 – REVISED JUNE 2014
Table 5-37. 0x18: MCSM0 - Main Radio Control State Machine Configuration
Bit
Field Name
Reset
R/W
Description
7:6
R0
Not used
Automatically calibrate when going to or from TX mode
Setting
When to perform automatic calibration
0 (00)
Never (manually calibrate using SCAL strobe)
1 (01)
When going from IDLE to TX (or FSTXON)
5:4
FS_AUTOCAL[1:0]
0 (00)
R/W
When going from TX back to IDLE
2 (10)
automatically
Every 4th time when going from TX to IDLE
3 (11)
automatically
Programs the number of times the six-bit ripple counter must
expire after the XOSC has settled before CHP_RDYn goes
low.(1)
If XOSC is on (stable) during power-down, PO_TIMEOUT
shall be set so that the regulated digital supply voltage has
time to stabilize before CHP_RDYn goes low
(PO_TIMEOUT=2 recommended). Typical start-up time for the
voltage regulator is 50
μs.
For robust operation it is recommended to use PO_TIMEOUT
= 2 or 3 when XOSC is off during power-down.
Timeout after
Setting
Expire count
3:2
PO_TIMEOUT
1 (01)
R/W
XOSC start
Approximately 2.3
0 (00)
1
- 2.4
μs
Approximately 37 -
1 (01)
16
39
μs
Approximately 149
2 (10)
64
- 155
μs
Approximately 597
3 (11)
256
- 620
μs
Exact timeout depends on crystal frequency.
1
0
R/W
Use setting from SmartRF Studio SWRC176
0
XOSC_FORCE_ON
0
R/W
Force the XOSC to stay on in the SLEEP state.
(1)
Note that the XOSC_STABLE signal will be asserted at the same time as the CHIP_RDYn signal; that is, the PO_TIMEOUT delays both
signals and does not insert a delay between the signals.
Table 5-38. 0x20: RESERVED
Bit
Field Name
Reset
R/W
Description
7:3
31 (11111)
R/W
Use setting from SmartRF Studio SWRC176
2
R0
Not used
1:0
0 (00)
R/W
Use setting from SmartRF Studio SWRC176
Table 5-39. 0x22: FREND0 - Front End TX Configuration
Bit
Field Name
Reset
R/W
Description
7:6
R0
Not used
LODIV_BUF_CURRENT_
Adjusts current TX LO buffer (input to PA). The value to use in
5:4
1 (01)
R/W
TX[1:0]
this field is given by the SmartRF Studio software SWRC176.
3
R0
Not used
Selects PA power setting. This value is an index to the
PATABLE, which can be programmed with up to 2 different PA
2:0
PA_POWER[2:0]
0 (000)
R/W
settings. When using OOK, PA_POWER should be 001, and for
all other modulation formats it should be 000, see Section 5.5.6.
Copyright © 2011–2014, Texas Instruments Incorporated
Detailed Description
53
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Product Folder Links: CC115L



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