ADPA7005AEHZ-R7 datasheet(22/24 Pages) AD

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Data Sheet

ADPA7005

BIASING ADPA7005 WITH THE HMC980LP4E

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Rev. A | 22 of 24

HMC980LP4E BIAS SEQUENCE

The dc supply sequencing in the Power-Up Sequence section and

the Power-Down Sequence section is required to prevent damage

to the HMC980LP4E when using it to control the ADPA7005.

Power-Up Sequence

The power-up sequence is as follows:

1. Set VDIG (Pin 9) of both HMC980LP4E devices to 3.3 V.

2. Set the VDD pins of both HMC980LP4E devices to 5.765 V.

3. Set VNEG (Pin 15) of both HMC980LP4E devices to −1.5 V.

This step is not needed if using an internally generated voltage.

4. Set EN (Pin 5) of both HMC980LP4E devices to 3.3 V (transi-

tioning from 0 V to 3.3 V turns on VGATE and VDRAIN).

Power-Down Sequence

The power-down sequence is as follows:

1. Set EN (Pin 5 of both HMC980LP4E devices) to 0 V (transition-

ing from 3.3 V to 0 V turns off VDRAIN and VGATE).

2. Set VNEG (Pin 15 of both HMC980LP4E devices) to 0 V. This

step is not needed if using an internally generated voltage.

3. Set the VDD pins of both HMC980LP4E devices to 0 V.

4. Set VDIG (Pin 9 of both HMC980LP4E devices) to 0 V.

When the HMC980LP4E bias control circuit is set up, toggle the

bias to the ADPA7005 on or off by applying 3.3 V or 0 V, respec-

tively, to the EN pin of the HMC980LP4E. At EN = 3.3 V, the

VGATE pin of the HMC980LP4E drops to −1.5 V and the VDRAIN

pin of the HMC980LP4E turns on at 5 V. VGATE then rises until

IDRAIN = 1800 mA, and the closed control loop regulates IDRAIN at

1800 mA. When EN = 0 V, VGATE is set to −1.5 V, and VDRAIN is

set to 0 V (see Figure 55 and Figure 56).

Figure 55. Turn On HMC980LP4E Outputs to ADPA7005

Figure 56. Turn Off HMC980LP4E Outputs to ADPA7005

ADPA7005AEHZ-R7 Datasheet(PDF) 22 Page - Analog Devices