ADPA7005AEHZ-R7 datasheet(23/24 Pages) AD

23 / 24 page

Data Sheet

ADPA7005

BIASING ADPA7005 WITH THE HMC980LP4E

analog.com

Rev. A | 23 of 24

CONSTANT DRAIN CURRENT BIASING VS.

CONSTANT GATE VOLTAGE BIASING

The HMC980LP4E uses a feedback loop to continuously adjust

VGATE to maintain a constant drain current over dc supply varia-

tion, temperature, RF input and output level, and device to device

variation. Constant drain current bias is the preferred method for re-

ducing time in calibration procedures and for maintaining consistent

performance over time.

In comparison to a constant gate voltage bias, where the current

increases when RF power is applied, a constant drain current has a

slightly lower output P1dB. This output P1db is shown in Figure 60,

where the RF performance is slightly lower than constant gate bias

voltage operation due to a lower drain current at high input power

(see Figure 57) as the HMC980LP4E reaches 1 dB compression.

The output P1dB performance for constant drain current bias can

be increased toward constant gate voltage bias performance by

increasing the set current toward the IDD value it reaches under RF

drive in the constant gate voltage bias condition (see Figure 60).

The limit of increasing drain current under the constant current

operation is set by the thermal limitations found in Table 5 with

the maximum power dissipation specification. As the IDD increase

continues, the actual output P1dB does not continue to increase

indefinitely but the power dissipation increases linearly. Therefore,

take the trade-off between the power dissipation and output P1dB

performance into consideration when using constant drain current

biasing.

Figure 57. Drain Current vs. PIN, VDD = 5 V, Frequency = 32 GHz, Constant

Drain Current Bias (IDRAIN Setpoint = 1.8 A) and Constant Gate Voltage Bias

(VGGx ≈ −0.68 V)

Figure 58. Output Power vs. PIN, VDD = 5 V, Frequency = 32 GHz, Constant

Drain Current Bias (IDRAIN Setpoint = 1.8 A) and Constant Gate Voltage Bias

(VGGx ≈ −0.68 V)

Figure 59. PAE vs. PIN, VDD = 5 V, Frequency = 32 GHz, Constant Drain

Current Bias (IDRAIN Setpoint = 1.8 A) and Constant Gate Voltage Bias (VGGx ≈

−0.68 V)

Figure 60. Output P1dB vs. Frequency, VDD = 5 V, Constant Drain Current

Bias (IDRAIN Setpoint = 1.8 A) and Constant Gate Voltage Bias

(VGGx ≈ −0.68 V))

ADPA7005AEHZ-R7 Datasheet(PDF) 23 Page - Analog Devices

ADPA7005AEHZ-R7 Datasheet(HTML) 23 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Datasheet Download

Link URL