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EL8173FSZ Datasheet(PDF) 13 Page - Intersil Corporation |
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EL8173FSZ Datasheet(HTML) 13 Page - Intersil Corporation |
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13 / 14 page ![]() 13 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN7490.4 February 14, 2008 External Resistor Mismatches Because of the independent pair of feedback terminals provided by the EL8170 and EL8173, the CMRR is not degraded by any resistor mismatches. Hence, unlike a three op amp and especially a two op amp in-amp, the EL8170 and EL8173 reduce the cost of external components by allowing the use of 1% or more tolerance resistors without sacrificing CMRR performance. The EL8170 and EL8173 CMRR is maintained regardless of the tolerance of the resistors used. Gain Error and Accuracy The EL8173 has a Gain Error, EG, of 0.2% typical. The EL8170 has an EG of 0.3% typical. The gain error indicated in the “Electrical Specifications” table on page 2 is the inherent gain error of the EL8170 and EL8173 and does not include the gain error contributed by the resistors. There is an additional gain error due to the tolerance of the resistors used. The resulting non-ideal transfer function effectively becomes Equation 4: Where: ERG= Tolerance of RG ERF= Tolerance of RF EG= Gain Error of the EL8170 or EL8173 The term [1 - (ERG + ERF + EG)] is the deviation from the theoretical gain. Thus, (ERG + ERF + EG) is the total gain error. For example, if 1% resistors are used for the EL8170, the total gain error would be: Disable/Power-Down The EL8170 and EL8173 can be powered down reducing the supply current to typically 2.9µA. When disabled, the output is in a high impedance state. The active low EN bar pin has an internal pull-down and hence can be left floating and the in-amp enabled by default. When the EN bar is connected to an external logic, the in-amp will power down when the EN bar is pulled above 2V, and will power-on when the EN bar is pulled below 0.8V. Power Dissipation It is possible to exceed the +150°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related in Equation 6: where: •PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) •PDMAX for each amplifier can be calculated as shown in Equation 7: where: •TMAX = Maximum ambient temperature • θJA = Thermal resistance of the package •PDMAX = Maximum power dissipation of 1 amplifier •VS = Supply voltage (Magnitude of V+ and V-) •IMAX = Maximum supply current of 1 amplifier •VOUTMAX = Maximum output voltage swing of the application •RL = Load resistance V OUT 1 R F R G -------- + ⎝⎠ ⎜⎟ ⎛⎞ 1E RG E RF E G ++ () – [] V IN × × = (EQ. 4) E RG E RF E G typical () ++ () ± = 0.01 0.01 0.003 ++ () ± = 2.3% ± = (EQ. 5) T JMAX T MAX θ JAxPDMAXTOTAL () + = (EQ. 6) PD MAX 2*V S I SMAX V S ( - V OUTMAX ) V OUTMAX R L ---------------------------- × + × = (EQ. 7) EL8170, EL8173 |
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