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PS240128WRF Datasheet(PDF) 12 Page - Powertip Technology |
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PS240128WRF Datasheet(HTML) 12 Page - Powertip Technology |
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12 / 27 page ![]() PE240128WRF-001-HQ VER.0 Page12 2.2 Interface Pin Description Pin No. Symbol Function 1 A0 Register select input pin − A0 = "H": DB0 to DB8 or SI are display data − A0 = "L": DB0 to DB8 or SI are control data 2 RW_WR Read / Write execution control pin MPU Type RW_WR Description 6800 RW Read / Write control input pin RW = “H” : read RW = “L” : write 8080 /WR Write enable clock input pin The data on DB0 to DB8 are latched at the rising edge of the /WR signal. 3 DB0 4 DB1 5 DB2 6 DB3 They connect to the standard 8-bit MPU bus via the 8 bit bi-directional bus.When the following interface is selected and the XCS pin is high, the following pins become highimpedance, which should be fixed to VDD or VSS. 7 DB4 8 DB5 9 DB6 10 DB7 In IIC Interface D7: SCL; D6: SI ; D0, D1: SA1, SA0 D3, D2: Acknowledgement D4, D5, D8 should be fixed to VDD or VSS. 11 E_RD Read / Write execution control pin MPU Type RW_WR Description 6800 E Read / Write control input pin -RW = “H”: When E is “H”, DB0 to DB8 are in an output status. -RW = “L”: The data on DB0 to DB8 are latched at the falling edge of the E signal. 8080 /RD Read enable clock input pin When /RD is “L”, DB0 to DB8 are in an output status. 12 RST Reset input pin. When RST is “L”, initialization is executed. |
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