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CY29658AI Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # CY29658AI
Description  2.5V or 3.3V 200-MHz 10-Output Zero Delay Buffer
PDF  7 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY29658AI Datasheet(HTML) 3 Page - Cypress Semiconductor

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CY29658
Document #: 38-07478 Rev. **
Page 3 of 7
Absolute Maximum Conditions
Parameter
Description
Condition
Min.
Max.
Unit
VDD
DC Supply Voltage
–0.3
5.5
V
VDD
DC Operating Voltage
Functional
2.375
3.465
V
VIN
DC Input Voltage
Relative to VSS
-0.3
VDD + 0.3
V
VOUT
DC Output Voltage
Relative to VSS
–0.3
VDD + 0.3
V
VTT
Output termination Voltage
VDD ÷ 2V
LU
Latch Up Immunity
Functional
200
mA
RPS
Power Supply Ripple
Ripple frequency < 100 kHz
150
mVp-p
TS
Temperature, Storage
Non-functional
–65
+150
°C
TA
Temperature, Operating Ambient
Functional
–40
+85
°C
TJ
Temperature, Junction
Functional
150
°C
ØJC
Dissipation, Junction to Case
Functional
42
°C/W
ØJA
Dissipation, Junction to Ambient
Functional
105
°C/W
ESDH
ESD Protection (Human Body Model)
2000
V
FIT
Failure in Time
Manufacturing test
10
ppm
DC Electrical Specifications (VDD = 2.5V ± 5%, TA = –40°C to +85°C)
Parameter
Description
Condition
Min.
Typ.
Max.
Unit
VIL
Input Voltage, Low
LVCMOS
–
–
0.7
V
VIH
Input Voltage, High
LVCMOS
1.7
–
VDD + 0.3
V
VPP
Peak-Peak Input Voltage
LVPECL
250
–
1000
mV
VCMR
Common Mode Range[4]
LVPECL
1.0
–
VDD – 0.6
V
VOL
Output Voltage, Low[5]
IOL = 15 mA
–
–
0.6
V
VOH
Output Voltage, High[5]
IOH = –15 mA
1.8
–
–
V
IIL
Input Current, Low[6]
VIL = VSS
–
–
–100
µA
IIH
Input Current, High[6]
VIL = VDD
––
100
µA
IDDA
PLL Supply Current
AVDD only
–
–
7
mA
IDDQ
Quiescent Supply Current
All VDD pins except AVDD
–
–
4
mA
IDD
Dynamic Supply Current
Outputs loaded @ 100 MHz
–
245
–
mA
CIN
Input Pin Capacitance
–
4
–
pF
ZOUT
Output Impedance
14
18
22
Ω
DC Electrical Specifications (VDD = 3.3V ± 5%, TA = –40°C to +85°C)
Parameter
Description
Condition
Min.
Typ.
Max.
Unit
VIL
Input Voltage, Low
LVCMOS
–
–
0.8
V
VIH
Input Voltage, High
LVCMOS
2.0
–
VDD + 0.3
V
VPP
Peak-Peak Input Voltage
LVPECL
250
–
1000
mV
VCMR
Common Mode Range[4]
LVPECL
1.0
–
VDD – 0.6
V
VOL
Output Voltage, Low[5]
IOL = 24 mA
–
–
0.55
V
IOL = 12 mA
–
–
0.30
VOH
Output Voltage, High[5]
IOH = –24 mA
2.4
–
–
V
Notes:
4.
VCMR (DC) is the crossing point of the differential input signal. Normal operation is obtained when the crossing point is within the VCMR range and the input
swing is within the VPP (DC) specification.
5.
Driving one 50
Ω parallel terminated transmission line to a termination voltage of V
TT. Alternatively, each output drives up to two 50 Ω series terminated
transmission lines.
6.
Inputs have pull-up or pull-down resistors that affect the input current.



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