www.ti.com

PACKAGE THERMAL IMPEDANCE

RECOMMENDED OPERATING CONDITIONS

(1) (2) (3)

SN74AVC4T774

4-BIT DUAL-SUPPLY BUS TRANSCEIVER

WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SCES693A – FEBRUARY 2008 – REVISED FEBRUARY 2008

UNIT

108

θ

JA

Package thermal impedance

39

°C/W

184

(1)

The package thermal impedance is calculated in accordance with JESD 51-7.

(2)

The package thermal impedance is calculated in accordance with JESD 51-5.

MIN

MAX

UNIT

Supply voltage

1.2

3.6

V

Supply voltage

1.2

3.6

V

1.2 V to 1.95 V

High-level

1.95 V to 2.7 V

1.6

V

input voltage

2.7 V to 3.6 V

2

1.2 V to 1.95 V

Low-level

1.95 V to 2.7 V

0.7

V

input voltage

2.7 V to 3.6 V

0.8

1.2 V to 1.95 V

DIR

High-level

(5)

1.95 V to 2.7 V

1.6

V

input voltage

(DIRx, OE)

2.7 V to 3.6 V

2

1.2 V to 1.95 V

DIR

Low-level

(5)

1.95 V to 2.7 V

0.7

V

input voltage

(DIRx, OE)

2.7 V to 3.6 V

0.8

Input voltage

0

3.6

V

Active state

0

Output voltage

V

3-state

0

3.6

1.1 V to 1.2 V

–3

1.4 V to 1.6 V

–6

High-level output current

1.65 V to 1.95 V

–8

mA

2.3 V to 2.7 V

–9

3 V to 3.6 V

–12

1.1 V to 1.2 V

3

1.4 V to 1.6 V

6

Low-level output current

1.65 V to 1.95 V

8

mA

2.3 V to 2.7 V

9

3 V to 3.6 V

12

Δt/Δv

Input transition rise or fall rate

5

ns/V

Operating free-air temperature

–40

85

°C

(1)

(2)

(3)

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

(4)

(5)

4

Submit Documentation Feedback

Copyright © 2008, Texas Instruments Incorporated

Product Folder Link(s): SN74AVC4T774