MPQ9840GL datasheet(19/34 Pages) MPS

19 / 34 page

MPQ9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER, AEC-Q100

MPQ9840 Rev. 1.02

www.MonolithicPower.com

7/1/2020

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

PIN FUNCTIONS

Pin #

QFN-16

(3mmx4mm)

Name

Description

PHASE

Selectable in-phase or 180° out-of-phase of SYNC input. Pull PHASE high to be

in-phase. Pull PHASE low to be 180° out-of-phase. Recommend to connect this pin

to GND if not used.

VIN

Input supply. VIN supplies power to all of the internal control circuitries and the

power switch connected to SW. Place a decoupling capacitor to ground close to VIN

to minimize switching spikes.

3, 10

Switch node. SW is the output of the internal power switch. Pin 3 and Pin 10 are

internally connected.

4, 9

PGND

Power ground. PGND is the reference ground of the power device and requires

careful consideration during PCB layout. For best results, connect PGND with

copper pours and vias.

Enable. Pull EN below the specified threshold to shut the chip down. Pull EN above

the specified threshold to enable the chip.

SYNC

Synchronize. Apply a 350kHz to 2.5MHz clock signal to SYNC to synchronize the

internal oscillator frequency to the external clock. The external clock should be at

least 250kHz larger than the RFREQ set frequency. SYNC can also be used to select

forced continuous conduction mode (CCM) or advanced asynchronous mode (AAM).

Before the chip starts up, drive SYNC low or leave SYNC floating to choose AAM,

and drive SYNC high to external power source or pull up SYNC to VCC directly to

set the part forced CCM mode.

Power good output. The output of PG is an open drain. Float PG if not used.

BIAS

Bias input. Connect BIAS to an external power supply (5V ≤ VBIAS ≤ 18V) to reduce

power dissipation and increase efficiency. If not in use, float BIAS or connect BIAS

to ground.

BST

Bootstrap. BST is the positive power supply for the high-side MOSFET driver

connected to SW. Connect a bypass capacitor between BST and SW.

VCC

Bias supply. VCC supplies power to the internal control circuit and gate drivers. A

decoupling capacitor (≥1µF) to ground is required close to VCC.

AGND

Analog ground. AGND is the reference ground of the logic circuit.

Optional external soft-start time setting. Connect an external capacitor between

this pin and GND to set soft-start time externally. The MPQ9840 sources 10µA from

SS to the soft-start capacitor during start-up. As the SS voltage rises, the feedback

threshold voltage increases to limit inrush current during start-up. Floating the pin

will activate the internal 0.7ms soft-start setting.

Feedback input. For adjustable output version, connect FB to the center point of the

external resistor divider. The feedback threshold voltage is 0.8V. Place the resistor

divider as close to FB as possible. Avoid placing vias on the FB traces. For fixed

output version, connect FB pin to the output directly.

FREQ

Switching frequency program. Connect a resistor from FREQ to ground to set the

switching frequency.

MPQ9840GL Datasheet(PDF) 19 Page - Monolithic Power Systems

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