TDA7500A

36/40

Figure 20. lock Diagram of Car Amplifier Audio Sub-System.

Clock Scheme

When TDA7500A is used in AD/FM mode the following scheme is choosen in order to avoid harmonics inside

the FM band. Parts of the system are directly clocked by the crystal oscillator, whereas other parts are driven

by the pll oscillator. Thanks to this it is possible to process any audio source as well analog as digital in parallel

to record FM mono for traffic informations, telephone resp. navigation and RDS. Figure 21 shows the clock

scheme. Regarding on the country and its FM bandwidth different crystals should be selected.

Figure 21. Clock Scheme

TDA7501

ANALOG INPUT

TDA7500A

FRONT END

TDA7421

AUDIO POWER

DISPLAY

MICRO

DIGITAL OUT

MAIN

MICRO

DRAM/

SRAM

EEPROM/

FLASH

DIGITAL IN

SPDIF

I

Fig20TDA7500A

A/D

D/A

Int./Ext.

8.55 MHz

Fext: 44.1 kHz, 48kHz

OSC

1.411 MHz (44.1*2*16)

1.536 MHz (48*2*16)

Fvco:

173.85 MHz (Fcomp*122)

158.05 MHz (Fcomp*112)

172.03 MHz (Fcomp*112)

A/D FM-mpx/

stereo audio

A/D mono

level / tel. / navi.

A/D FM-rds /

noise det.

RDS-Demod.

Audio DSP

D/A Coverters

Fconverter:

12.42 MHz (Fvco/14)

11.29 MHz (Fvco/14)

12.29 MHz (Fvco/14)

Fdsp:

43.46 MHz (Fvco/4)

39.51 MHz (Fvco/4)

43.01 MHz (Fvco/4)

PLL

Stereo DSP

44.1 kHz

48

kHz

Frds:

8.55 MHz (Fxtal)

Xtal

FM Japan

West Europe East

76..90

87.5..108 65..74

[MHz]

86.92

86.92

8.89 MHz

90.38

90.38

2nd

Hamonics

3rd

Hamonics

135.57

135.57

130.38

130.38