Rev. 1.10

18

November 25, 2015

HT9B95A/B/G

Command Summary

The overall commands are summarized in this section.

Note that the bit 7 denoted as “C” in the individual

command here is the selection bit which is used to

determine that the next byte is the display RAM data

or command byte.

C bit

Description

0

Next byte is Display RAM data

1

Next byte is command

Command

(MSB)

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1 (LSB)

Bit0

Function description

Display RAM

Address setting

C

0

A5

A4

A3

A2

A1

A0

The display RAM address and

command register setting.

LCD driving Voltage

Adjustment (LVA)

C

1

0

LV4

LV3

LV2

LV1

LV0 Adjust the maximum voltage

level of LCD driving voltage.

Display control

C

1

1

0

FR1

FR0

PS1

PS0 Frame frequency setting and

power save mode setting

Drive mode setting

and software reset

C

1

1

1

0

W

SR

D

LCD drive waveform select,

display ON/OFF setting and

software reset

All pixel control

setting

C

1

1

1

1

0

AP1

AP0 All pixel control setting

Duty and Bias

setting

C

1

1

1

1

1

0

DB Duty and bias setting

Note: The “Duty and Bias setting” command is available in the HT9B95B and HT9B95G device.

Display RAM Address Setting Command

This command is used to define the accessed address of the display RAM or command register.

Function

(MSB)

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1 (LSB)

Bit0

Note

Address Pointer

C

0

A5

A4

A3

A2

A1

A0

Display RAM memory start address

or Command register address.

Note:

• The display RAM address range is dependent upon the selected device with different duty setting.

Part No.

Duty

Maximum Available Address

HT9B95A

1/8

22H

HT9B95B

HT9B95G

1/4

15H

1/8

26H

• The command register address is dependent upon the selected device.

Part No.

Command Register 1 Address

Command Register 2 Address

HT9B95A

23H

24H

HT9B95B

HT9B95G

27H

28H

• Power on status: the address will be set to 00H

• If the programmed command is not defined, the function will not be affected.