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UPC835 Datasheet(PDF) 3 Page - Renesas Technology Corp |
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UPC835 Datasheet(HTML) 3 Page - Renesas Technology Corp |
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3 / 8 page ![]() UPC835 R03DS0186EJ0100 Rev.1.00 Page 3 of 8 Mar.10.25 ELECTRICAL CHARACTERISTICS (TA = 25 °C, V± = ±15 V, unless otherwise specified) Parameter Symbol MIN. TYP. MAX. Unit Test Condition Input Offset Voltage VIO ±1.5 ±3 mV RS ≤ 50 Ω Input Offset Current IIO ±25 ±100 pA Input Bias Current Note7 IB 50 200 pA Large Signal Voltage Gain AV 25000 200000 RL ≥ 2 kΩ, VO = ±10 V Circuit Current Note8 ICC 1.4 2.2 mA IO = 0 A Common Mode Rejection Ratio CMR 70 80 dB Supply Voltage Rejection Ratio SVR 70 85 dB Output Voltage Swing Vom ±12 +14.0 -13.3 V RL ≥ 10 kΩ Output Voltage Swing Vom ±10 +13.5 -12.8 V RL ≥ 2 kΩ Common Model Input Voltage Range VICM +11.7 -11.0 +15 -12 V Slew Rate SR 5.5 V/μs AV = 1 Unity Gain Frequency funity 2.8 MHz Input Equivalent Noise Voltage Density en 25 nV/ Hz RS = 100 Ω, f = 1 kHz Channel Separation 120 dB Average VIO Temperature Drift Δ VIO/ΔT ±7 μV/°C TA = -20 ~ +70 °C 【 Note】7. Input bias currents flow into IC, because each currents are base current to Pch J-FET on input stage.When TJ = 25°C or more, this figure exponentially grows along with a rise of temperature. 8. This current flows irrespective of the existence of use. Caution Special attention is required for insulation between pins on a board, since the UPC835 has a high-input impedance characteristic.. |
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