R03DS0186EJ0100 Rev.1.00

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Mar.10.25

Datasheet

UPC835

Low Power, High Stability, Low Offset Voltage

J-FET Input Dual Operational Amplifier

DESCRIPTION

The UPC835 is the higher version of UPC832 and 4062, the J-FET input operational amplifiers, in stability and

accuracy. The UPC835 is a J-FET input dual operational amplifier which realizes both low power consumption

and high stability, by adopting a high speed PNP transistor of fT = 300 MHz on its output stage.

In addition, despite its J-FET input, the UPC835 realizes low offset voltage characteristics that eclipses

conventional general operational amplifiers, by using a resistance trimming system, the proven method for our

high accuracy operational amplifier and high accuracy reference voltage.

The UPC835 is ideal for use in measurement instruments and control instruments, which especially requires

the stability during capacitive load connections.

FEATURES

• Input Offset Voltage

±3 mV MAX.

• Slew Rate

5.5 V/μs (TYP.)

• Unity Gain Frequency

2.8 MHz (TYP.)

• Low Power

ICC ≤ 2.2 mA MAX.

(Reduces circuit currents while maintaining relatively high slew rate and bandwidth)

• High stability is secured to capacitive loads

(Capacitive Load at 4000 pF, AV = +1 )

• Built-In Phase Compensation Circuit

• Small package

The whole size of the package is downsized by 30 to 40% compared with a standard SOP contour,

by using a TSSOP (3 x 3 mm2 body) package

ORDERING INFORMATION

Order Name

Package

Packing Type

UPC835MN-KAA-E1-AT Note

8-pin plastic TSSOP ( 3 x 3 )

· 12mm wide embossed taping

· Pin 1 at draw-out side

· 4000 p/reel

UPC835MN-KAA-E2-AT Note

8-pin plastic TSSOP ( 3 x 3 )

· 12mm wide embossed taping

· Pin 1 at reel side

·4000 p/reel

Note Pb-free (This product does not contain Pb in the external electrode and other parts.)