RZSLASHG2M datasheet(98/169 Pages) RENESAS

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RZ/G Series, 2nd Generation Datasheet

Section 3. Electrical Characteristics

R01DS0483EJ0101 Rev.1.01

Page 98 of 169

Jun 30, 2025

3.14 LVDS-IF

Table 3.14.1 AC Characteristics (1.8-V I/O [LVDS]) [RZ/G2H, RZ/G2M V1.3, RZ/G2M V3.0,RZ/G2N (in

Single-link), RZ/G2E (in Single-link)]

Conditions:

VDDQ18_LVDS = VDD18_LVDSPLL1 = 1.8V ± 0.1V,

VDDQ09_LVDS = VDD09_LVDSPLL2 = 0.82V + 0.06V/-0.07V,

GND = VSS = 0V [RZ/G2M V1.3, RZ/G2M V3.0, RZ/G2H, RZ/G2N],

VDDQ18_LVDS = VDD18_LVDSnPLL (n = 0, 1) = 1.8V ± 0.1V,

GND = VSS = VSS_LVDSnPLL (n = 0, 1) = 0V [RZ/G2E]

Tc = -40 to +115°C [RZ/G2M V1.3, RZ/G2H],

Ta = -40 to +85°C [RZ/G2M V3.0, RZ/G2N, RZ/G2E],

Tj = -40 to +115°C [RZ/G2M V3.0, RZ/G2N, RZ/G2E],

CL = 3pF

Item

Symbol

Min.

Typ.

Max.

Unit

Measurement

condition

Figures

Input Clock

Frequency of LVDS

FCPHIN

31.0 [RZ/G2H,

RZ/G2M V1.3,

RZ/G2M V3.0,

RZ/G2N]

—

150.0

MHz

—

Figure

3.14.1

Output Clock

Frequency of LVDS

FCLKP/CLKN

31.0 [RZ/G2H,

RZ/G2M V1.3,

RZ/G2M V3.0,

RZ/G2N]

—

150.0

MHz

—

Figure

3.14.2

5.0 [RZ/G2E]

Output Clock of LVDS

TCP

6.67

—

32.2

[RZ/G2H,

RZ/G2M

V1.3,

RZ/G2M

V3.0,

RZ/G2N]

—

200.0

[RZ/G2E]

Output Data Rate of

LVDS

FDAP/DAN

217.0 [RZ/G2H,

RZ/G2M V1.3,

RZ/G2M V3.0,

RZ/G2N]

—

1050.0

Mbps

—

35.0 [RZ/G2E]

LVDS Output Pulse

Position 0

TPPOS0

-0.150

0.150

—

LVDS Output Pulse

Position 1

TPPOS1

(TCP/7) -0.150

TCP/7

(TCP/7)

+0.150

—

LVDS Output Pulse

Position 2

TPPOS2

2(TCP/7) -0.150

2TCP/7

2(TCP/7)

+0.150

—

LVDS Output Pulse

Position 3

TPPOS3

3(TCP/7) -0.150

3TCP/7

3(TCP/7)

+0.150

—

LVDS Output Pulse

Position 4

TPPOS4

4(TCP/7) -0.150

4TCP/7

4(TCP/7)

+0.150

—

RZ/G2H

RZ/G2M V1.3

RZ/G2N

RZ/G2E

RZ/G2M V3.0

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