RZSLASHG2M datasheet(159/169 Pages) RENESAS

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RZ/G Series, 2nd Generation Datasheet

Section 3. Electrical Characteristics

R01DS0483EJ0101 Rev.1.01

Page 159 of 169

Jun 30, 2025

Table 3.36.2 HDMI Dot Clock Input (DU_DOTCLKIN1/2) Characteristics

Conditions: VDDQ18 = 1.8 V ± 0.1 V, GND = VSS = 0 V,

Tc = -40 to +115 °C [RZ/G2H, RZ/G2M V1.3],

Ta = -40 to +85 °C [RZ/G2M V3.0, RZ/G2N],

Tj = -40 to +115 °C [RZ/G2M V3.0, RZ/G2N]

Item

Symbol

Min.

Typ.

Max.

Unit

Measurement

conditions

Remarks

Frequency range

—

MHz

—

Frequency tolerance

f_tol

-100

—

100

ppm

—

Deterministic jitter

—

RMS jitter

RMSj

—

600

100 kHz~5 MHz —

Table 3.36.3 AC Characteristics (DDC Signal for HDMI)

Conditions: VDDQ18 = 1.8 V ± 0.1 V,

GND = VSS = 0 V,

Tc = -40 to +115 °C [RZ/G2H, RZ/G2M V1.3],

Ta = -40 to +85 °C [RZ/G2M V3.0, RZ/G2N],

Tj = -40 to +115 °C [RZ/G2M V3.0, RZ/G2N]

Item

Symbol

Conditons

Min

Typ

Max

Unit

HDSCL Clock Frequency

fHDSCL

Standard mode

—

100

kHz

Bus Free Time (stop and start)

tHDSDA_BFtime

4.7

—

μs

HDSCL Hold Time (on start)

tHDSCL_HOLD_ST

4.0

—

μs

HDSCL Low Width

tL_HDSCL

4.7

—

μs

HDSCL High Width

tH_HDSCL

4.0

—

μs

HDSCL Setup Time (on start)

tHDSCL_SETUP_ST

4.7

—

μs

HDSDA Hold Time

tHDSDA_HOLD

—

3.45

μs

HDSDA Setup Time

tHDSDA_SETUP

250

—

HDSCL Setup Time

tHDSCL_SETUP

4.0

—

μs

Note:

Capacitive load for each bus line (Cb): Max. 400 pF

HDMI0/1_SDA and HDMI0/1_SCL Signals Rising Time (Cb ≤ 300 pF): Max. 1000 ns

HDMI0/1_SDA and HDMI0/1_SCL Signals Falling Time (Cb ≤ 300 pF): Max. 300 ns

Figure 3.36.6 DDC Signals Definition for HDMI

HDMI0/1_SCL

Stop

HDMI0/1_SDA

Start

Stop

tHDSDA_BFtime

tHDSCL_HOLD_ST

tL_HDSCL

1/fHDSCL

tHDSDA_HOLD

tH_HDSCL

tHDSCL_SETUP_ST

tHDSCL_SETUP

tHDSDA_SETUP

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