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RZ/G2N Datasheet(PDF) 25 Page - Renesas Technology Corp

Part # RZ/G2N
Description  RZ/G Series, 2nd Generation
PDF  169 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

RZ/G2N Datasheet(HTML) 25 Page - Renesas Technology Corp

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RZ/G Series, 2nd Generation Datasheet
Section 1 Overview
R01DS0483EJ0101 Rev.1.01
Page 25 of 169
Jun 30, 2025
1.1.12
Peripheral Module
Item
Description
IIC Bus Interface for
PMIC (IIC for PMIC)
(For All Products)
• 1 PMIC channel for dedicated buffer
• Supports single master transmission/reception
• Interrupt request
• Automatic transfer by wakeup control
I2C Bus Interface
(I2C)
(For All Products)
RZ/G2H RZ/G2M V1.3 RZ/G2M V3.0 RZ/G2N
• 7 channels
• 4 channels for buffers with a slew rate (channel 0, 3, 4, 5 for dedicated buffers)
• 3 channels for LVTTL buffers (channels 1, 2, 6 for ordinary buffers)
RZ/G2E
• 8 channels
• 2 channels for buffers with a slew rate (channel 0, 3 for dedicated buffers)
• 6 channels for LVTTL buffers (channels 1, 2, 4, 5, 6, 7 for ordinary buffers)
RZ/G2H RZ/G2M V1.3 RZ/G2M V3.0 RZ/G2N RZ/G2E
• NXP I2C bus interface method supported
• Master/slave functions
• Multi-master functions
• Transfer rate up to 400 kbps supported
• Programmable clock generation from the system clock
• Master and Slave function DMA supported



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