RZSLASHG2E datasheet(72/169 Pages) RENESAS

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RZ/G Series, 2nd Generation Datasheet

Section 3. Electrical Characteristics

R01DS0483EJ0101 Rev.1.01

Page 72 of 169

Jun 30, 2025

Item

Symbol

Min.

Typ.

Max.

Unit

Measurement

conditions

Remarks

High Hi-Z leak

current

IOZH

—

μA

VDDQ_DDR =

VDDQ_CK =

1.450 V

Other than

MZQ and

MVREF pins

Low Hi-Z leak

current

IOZL

-4

—

μA

High Hi-Z leak

current

IOZH

—

μA

MZQ pin

Low Hi-Z leak

current

IOZL

-5

—

μA

High Hi-Z leak

current

IOZH

—

μA

—

MVREF pin

Low Hi-Z leak

current

IOZL

-25

—

μA

—

Pin capacitance

—

All pins*3

PLL power supply

1.7

1.8

1.9

—

Notes: 1. Peak to peak ac noise on VREF may not exceed ± 2 % of VREF.

2. The VIX (AC) indicates the voltage at which differential input signals cross each other. The typical value of VIX

(AC) is expected to be 0.5 × VDDQ_DDR.

3. Except power supply pins.

4. VDDQ_MAPLL, VDDQ_MDPLL0, VDDQ_MDPLL1 pins.

Table 3.4.21 DDR3L Interface ODT Characteristics

Item

Symbol Min.

Typ.

Max.

Unit

Measurement

conditions

Remarks

Termination voltage

Vtt

VREF –

0.04

VREF

VREF +

0.04

VDD = 1.0 Vtyp,

VDDQ_DDR =

VDDQ_CK =

1.283 to 1.450 V

—

ODT resistance

(60 Ω)

RTT60

54.0

—

96.0

Ω

—

ODT resistance

(40 Ω)

RTT40

36.0

—

64.0

Ω

—

VM deviation

ΔVM

-7

—

Note:

VM is a voltage value measured with the ODT turned on without any load applied to this LSI chip. ΔVM is

obtained by the following formula:

ΔVM = (2 × VM / VDDQ_DDR -1) × 100

RZ/G2H

RZ/G2M V1.3

RZ/G2N

RZ/G2E

RZ/G2M V3.0

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