RZSLASHG2E datasheet(81/169 Pages) RENESAS

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RZ/G Series, 2nd Generation Datasheet

Section 3. Electrical Characteristics

R01DS0483EJ0101 Rev.1.01

Page 81 of 169

Jun 30, 2025

3.7

EXTAL Clock Input/output Timing

3.7.1

EXTAL Clock Input Timing

Table 3.7.1

EXTAL Clock Input Timing

Conditions: VDDQ18 = 1.8 V ± 0.1 V, GND = VSS = 0 V, Ta = -40 to +85 °C, Tj = -40 to +115 °C

Item

Symbol

Min.

Typ.

Max.

Unit

Remarks

Figures

EXTAL clock input frequency

fEX

—

MHz

Frequency

deviation:

±100 ppm or

less

—

EXTAL clock input cycle time

tEXcyc

—

20.83

—

Figure

3.7.1

EXTAL clock input duty cycle time

tEXduty

0.4

0.5

0.6

tEXcyc —

EXTAL clock input low-level pulse width

tEXL

—

EXTAL clock input high-level pulse width

tEXH

—

EXTAL clock input rise time

tEXr

—

EXTAL clock input fall time

tEXf

—

Note:

Set the MD9 pin to L (low) during power-on reset when using the EXTAL pin as external clock input and the XTAL

pin must be open.

Figure 3.7.1 EXTAL Clock Input Timing

EXTAL

(input)

1/2VDDQ18

VIH

VIL

1/2VDDQ18

tEXcyc

tEXduty

tEXH

tEXL

tEXf

tEXr

RZ/G2H

RZ/G2M V1.3

RZ/G2N

RZ/G2E

RZ/G2M V3.0

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