| Electronic Components Datasheet Search |
|
RZ/G2LC Datasheet(PDF) 56 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
RZ/G2LC Datasheet(HTML) 56 Page - Renesas Technology Corp |
|
56 / 74 page ![]() RZ/G2L Group, RZ/G2LC Group 3. Electrical Characteristics R01DS0484EJ0110 Rev.1.10 Page 56 of 74 May 30, 2025 3.5.14 Port Output Enable 3 (POE3) Access Timing Table 3.41 POE3 Timing Item Symbol Min. Max. Unit Figures POE3 POEn# input pulse width tPOE3W 1.5 — tp1cy* 1 Figure 3.42 Note 1. tp1cyc indicates peripheral clock means POE3_CLKM_POE (P0 ϕ). POEn# input tPOE3W Figure 3.42 POEn# Input Pulse Timing 3.5.15 General PWM Timer (GPT) Access Timing Table 3.42 GPT Timing Item Symbol Min. Max. Unit Figures GPT Input capture input pulse width Single-edge setting tGTICW 1.5 — tp1cyc* 1 Figure 3.43 Both-edge setting 2.5 — Note: AC access timing condition: drive ability 4mA, output load 30pF, slew rate = fast Note 1. tp1cyc indicates peripheral clock means GPT_PCLK (P0 ϕ). Input capture Input tGTICW Figure 3.43 GPT Input Capture Input Timing |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |