Integrator

Filter

Probe

Interface

H−Bridge

Driver

V

OUT

REF

IN

I

COMP2

R

S

I

COMP1

Compensation

Patents Pending.

Diff

Amp

Timing, Error Detection,

and Power Control

Degauss

V

REF

V

REF

GND

+5V

IS2

IS1

DRV401

I

P

Compensation Winding

Magnetic Core

Primary Winding

Field Probe

PWM

PWM

ABSOLUTE MAXIMUM RATINGS

(1)

DRV401-EP

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PRODUCT

PACKAGE-LEAD

PACKAGE MARKING

DRV401

SO-20

DWP

DRV401M

(1)

For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

Supply voltage

+7

V

–0.5

V

–10

+10

V

Signal Input

terminals:

Current at IS1 and IS2

±75

mA

±25

mA

(4)

+250

mA

Operating junction temperature

–55

+150

°C

Storage temperature

–55

+150

°C

1

kV

Human body model

ESD rating

(HBM)

All other pins

4

kV

(1)

Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may

degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond

those specified is not supported.

(2)

Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must

be current limited, except for the differential amplifier input pins.

(3)

These inputs are not internally protected against over voltage. The differential amplifier input pins must be limited to 5 mA, max or

±10 V, max.

(4)

Power-limited; observe maximum junction temperature.

2

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Product Folder Link(s): DRV401-EP