CC1111F16RSP datasheet(35/240 Pages) TAOS

35 / 240 page

CC1110Fx / CC1111Fx

SWRS033E

Page 35 of 239

configure whether peripheral modules control

certain pins or if they are under software

control. In the latter case, each pin can be

configured as an input or output and it is also

possible to configure the input mode to be pull-

up, pull-down, or tristate. Each peripheral that

connects to the I/O-pins can choose between

two different I/O pin locations to ensure

flexibility in various applications. See section

13.4 for details.

The Sleep Timer is an ultra-low power timer

which use a 32.768 kHz crystal oscillator or a

low power RC oscillator as clock source. The

Sleep Timer runs continuously in all operating

modes except active mode and PM3 and is

typically used to get out of PM0, PM1, or PM2.

See section 13.8 for details.

built-in

watchdog

timer

allows

the

CC1110Fx/CC1111Fx to reset itself in case the

firmware hangs. When enabled, the watchdog

timer must be cleared periodically, otherwise it

will reset the device when it times out. See

section 13.13 for details.

Timer 1 is a 16-bit timer which supports typical

timer/counter functions such as input capture,

output compare, and PWM functions. The

timer has a programmable prescaler, a 16-bit

period

value,

and

three

independent

capture/compare channels.

Each of

the

channels can be used as PWM outputs or to

capture the timing of edges on input signals. A

second order Sigma-Delta noise shaper mode

is also supported for audio applications. See

section 13.6 for details.

Timer 2 (MAC timer) is specially designed to

support time-slotted protocols in software. The

timer has a configurable timer period and a

programmable prescaler range. See section

13.7 for details.

Timers 3 and Timer 4 are two 8-bit timers

which supports typical timer/counter functions

such as output compare and PWM functions.

They have a programmable prescaler, an 8-bit

period value, and two compare channels each,

which can be used as PWM outputs. See

section 13.9 for details.

USART

and

USART

are

each

configurable as either an SPI master/slave or

a UART. They provide hardware flow-control

and double buffering on both RX and TX and

are thus well suited for high-throughput, full-

duplex applications. Each has its own high-

precision baud-rate generator, hence leaving

the ordinary timers free for other uses. When

configured as an SPI slave they sample the

input signal using SCK directly instead of

using some over-sampling scheme and are

therefore well-suited for high data rates. See

section 13.14 for details.

The AES encryption/decryption core allows

the user to encrypt and decrypt data using the

AES algorithm with 128-bit keys. See section

13.12 for details.

The ADC supports 7 to 12 bits of resolution in

a 30 kHz to 4 kHz bandwidth respectively. DC

and audio conversions with up to eight input

channels (P0) are possible (

CC1111Fx is limited

to six channels). The inputs can be selected

as single ended or differential. The reference

voltage can be internal, VDD, or a single

ended or differential external signal. The ADC

also has a temperature sensor input channel.

The ADC can automate the process of

periodic sampling or conversion over a

sequence of channels. See Section 13.10 for

details.

The USB allows the

CC1111Fx to implement a

Full-Speed USB 2.0 compatible device. The

USB has a dedicated 1 KB SRAM that is used

for the endpoint FIFOs. 5 endpoints are

available in addition to control endpoint 0.

Each of these endpoints must be configured

as Bulk/Interrupt or Isochronous and can be

used as IN, OUT or IN/OUT. Double buffering

of packets is also supported for endpoints 1-5.

The maximum FIFO memory available for

each endpoint is as follows: 32 bytes for

endpoint 0, 32 bytes for endpoint 1, 64 bytes

for endpoint 2, 128 bytes for endpoint 3, 256

bytes for endpoint 4, and 512 bytes for

endpoint 5. When an endpoint is used as

IN/OUT, the FIFO memory available for the

endpoint can be distributed between IN and

OUT depending on the demands of the

application. The USB does not exist on the

CC1110Fx. See section 13.16 for details.

The I

2S can be used to send/receive audio

samples to/from an external sound processor

or DAC and may operate at full or half duplex.

Samples of up to 16-bits resolution can be

used although the I

2S can be configured to

send more low order bits if necessary to be

compliant with the resolution of the receiver

(up to 32 bit). The maximum bit-rate supported

is 3.5 Mbps. The I

2S can be configured as a

master or slave device and supports both

mono and stereo. Automatic

µ-Law expansion

and compression can also be configured. See

section 13.15 for details.

CC1111F16RSP Datasheet(PDF) 35 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

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