DS80C320-ENG datasheet(101/175 Pages) DALLAS

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High-Speed Microcontroller User’s Guide

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The timing of the switchback is dependent on the source. Interrupt–initiated switchbacks will occur at the

start of the first C1 cycle following the event initiating the switchback. In PMM, each internal Cx cycle

is 16 external clock cycles for PMM1 and 256 cycles for PMM2. If the current instruction in progress is

a write to the IE, IP, EIE, or EIP registers, interrupt processing will be delayed until the completion of the

following instruction. Serial transmit-initiated switchbacks occur at the start of the instruction following

the MOV that loads SBUF0 or SBUF1. Serial reception-initiated switchbacks occur during the Cx cycle

in which the falling edge was detected. There are a few points that must be considered when using a

serial port reception to generate a switchback. Under normal circumstances, noise on the line or an

aborted transmission would cause the serial port to time-out and the data to be ignored. This presents a

problem if the switchback is used, however, because a switchback would occur but there is no indication

to the system that one has occurred.

If PMM and serial port switchback functions are used in a noisy

environment, the user is advised to periodically check if the device has accidentally exited PMM.

A similar problem can occur if multiprocessor communication protocols are used in conjunction with

PMM. The High-Speed Microcontroller family supports both the use of the SM2 flag (SCON0.5 or

SCON1.5), and the slave address recognition registers (SADDR0;A9h, SADDR1;AAh, SADEN0;B9h,

SADEN1;BAh) for multiprocessor communications. The problem is that an invalid address which should

be ignored by a particular processor will still generate a switchback. As a result it is not recommended to

use a multiprocessor communication scheme in conjunction with PMM. If the system

power considerations will allow for an occasional erroneous switchback, a polling scheme can be used to

place the device back into PMM.

CLOCK SOURCE SELECTION

The High-Speed Microcontroller family supports three different clock sources for operation. As with

most microcontrollers, the device can be clocked from an external crystal using the on-board crystal

amplifier, or a clock source can supplied by an external oscillator. In addition, some members of the

High-Speed Microcontroller family incorporate an on-board ring oscillator to provide a quick resumption

from Stop mode. The ring oscillator is a low power digital oscillator internal to the microcontroller.

When enabled, it provides an approximately 2-4 MHz clock source for device operation without external

components. The ring oscillator is not as stable as an external crystal, and software should refrain from

performing timing dependent operations, including serial port activity, while operating from the ring

oscillator.

The ring oscillator provides many advantages to the designers of microcontroller-based systems. One is

that it allows Dallas Semiconductor microcontrollers to perform a fast resume from Stop mode,

eliminating the crystal warm-up delay when restarting the device. As an added feature, the DS87C520

and DS87C530 will also support extended operation from the ring oscillator, not only during the crystal

warm-up period when resuming from Stop. All devices in the High-Speed Microcontroller

family must begin operation following a power-on reset from an external clock source, either an external

crystal or oscillator. Software can then disable the crystal and run from the lower power ring oscillator.

The control and status bits which support the new and/or enhanced features are shown in Table 7-5.

DS80C320-ENG Datasheet(PDF) 101 Page - Dallas Semiconductor