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M48T212V Datasheet(PDF) 23 Page - STMicroelectronics |
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M48T212V Datasheet(HTML) 23 Page - STMicroelectronics |
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23 / 35 page ![]() M48T212V Clock operation 23/35 Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of adjustment per calibration step in the calibration register. Assuming that the oscillator is running at exactly 32,768 Hz, each of the 31 increments in the Calibration byte would represent +10.7 or –5.35 seconds per month which corresponds to a total range of +5.5 or – 2.75 minutes per month. Two methods are available for ascertaining how much calibration a given M48T212Y/V may require. The first involves setting the clock, letting it run for a month and comparing it to a known accurate reference and recording deviation over a fixed period of time. Calibration values, including the number of seconds lost or gained in a given period, can be found in Application Note, “AN934, TIMEKEEPER® Calibration.” This allows the designer to give the end user the ability to calibrate the clock as the environment requires, even if the final product is packaged in a non-user serviceable enclosure. The designer could provide a simple utility that accesses the Calibration byte. The second approach is better suited to a manufacturing environment, and involves the use of the IRQ/FT pin. The pin will toggle at 512Hz, when the Stop Bit (ST, D7 of 9h) is '0,' the Frequency Test Bit (FT, D6 of Ch) is '1,' the Alarm Flag Enable Bit (AFE, D7 of 6h) is '0,' and the Watchdog Steering Bit (WDS, D7 of 7h) is '1' or the Watchdog Register (7h=0) is reset. Any deviation from 512 Hz indicates the degree and direction of oscillator frequency shift at the test temperature. For example, a reading of 512.010124 Hz would indicate a +20 ppm oscillator frequency error, requiring a –10 (WR001010) to be loaded into the Calibration Byte for correction. Note that setting or changing the Calibration Byte does not affect the Frequency test output frequency. The IRQ/FT pin is an open drain output which requires a pull-up resistor to VCC for proper operation. A 500-10k Ω resistor is recommended in order to control the rise time. The FT Bit is cleared on power-up. 3.11 Battery low warning The M48T212V automatically performs battery voltage monitoring upon power-up and at factory-programmed time intervals of approximately 24 hours. The Battery Low (BL) Bit, Bit D4 of Flags Register 0h, will be asserted if the battery voltage is found to be less than approximately 2.5V. The BL Bit will remain asserted until completion of battery replacement and subsequent battery low monitoring tests, either during the next power-up sequence or the next scheduled 24-hour interval. If a battery low is generated during a power-up sequence, this indicates that the battery is below approximately 2.5 volts and may not be able to maintain data integrity in the SRAM. Data should be considered suspect and verified as correct. A fresh battery should be installed. If a battery low indication is generated during the 24-hour interval check, this indicates that the battery is near end of life. However, data is not compromised due to the fact that a nominal VCC is supplied. In order to ensure data integrity during subsequent periods of battery back-up mode, the battery should be replaced. The SNAPHAT® battery/crystal top should be replaced with VCC powering the device to avoid data loss. Note: This will cause the clock to lose time during the time interval the battery crystal is removed. The M48T212V only monitors the battery when a nominal VCC is applied to the device. Thus applications which require extensive durations in the battery back-up mode should be |
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