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ORSPI4 Datasheet(PDF) 179 Page - Lattice Semiconductor |
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ORSPI4 Datasheet(HTML) 179 Page - Lattice Semiconductor |
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179 / 263 page  Lattice Semiconductor ORCA ORSPI4 Data Sheet 179 Table 59. SPI4.2 Transmit Data Interface Timing Figure 92 defines the timing parameters ts and th which show the setup and hold requirements at the ORSPI4 receive interface when in static mode, which are dependent on the SPI_DLYTAP register settings chosen. Values of ts and th at all values of SPI_DLYTAP are given in Table 60. Figure 92. SPI4.2 Receive Timing Points with Respect to Clock Edge Symbol Description Min Max Units tdia ORSPI4 transmit data (TDAT[15:0], TCTL) invalid window before clock edge (Source A) —0 ps tdib ORSPI4 transmit data (TDAT[15:0], TCTL) invalid window after clock edge (Source A) — 400 ps DTDCLK TDCLK duty cycle 45% 55% TDCLK Period RDCLK RDAT (B) Capture Edge t S t H SPI_DLYTAP_A,B[2:0]=0 SPI_DLYTAP_A,B[2:0]=4 SPI_DLYTAP_A,B[2:0]=7 t S t S t H t H |
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